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2008 IEEE Radio Frequency Integrated Circuits Symposium最新文献

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An ultra-wideband transmitter based on a new pulse generator 基于新型脉冲发生器的超宽带发射机
2008 IEEE Radio Frequency Integrated Circuits Symposium Pub Date : 2008-07-15 DOI: 10.1109/RFIC.2008.4561382
Marco Cavallaro, E. Ragonese, G. Palmisano
{"title":"An ultra-wideband transmitter based on a new pulse generator","authors":"Marco Cavallaro, E. Ragonese, G. Palmisano","doi":"10.1109/RFIC.2008.4561382","DOIUrl":"https://doi.org/10.1109/RFIC.2008.4561382","url":null,"abstract":"The paper describes an ultra-wideband transmitter, which incorporates an innovative carrier-based pseudo-Gaussian pulse generator satisfying FCC rules with no-filter and high spectral efficiency. The design includes a BPSK modulator, a ramp generator and an output buffer. The transmitter is designed for run up to 500 Mpps in the UWB 3-5-GHz band and it is implemented in 0.28-mum CMOS technology with a core chip size of 0.06-mm2. It allows the use in various UWB applications. Pulse generator dissipation is 1.9-mW.","PeriodicalId":253375,"journal":{"name":"2008 IEEE Radio Frequency Integrated Circuits Symposium","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2008-07-15","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131203408","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 11
A new highly-scalable equivalent circuit model for on-chip symmetrical transformer with accurate substrate modeling 一种新的具有精确基板建模的片上对称变压器高可扩展等效电路模型
2008 IEEE Radio Frequency Integrated Circuits Symposium Pub Date : 2008-07-15 DOI: 10.1109/RFIC.2008.4561530
Chuan Wang, H. Liao, Chen Li, Yongzhong Xiong, Ru Huang
{"title":"A new highly-scalable equivalent circuit model for on-chip symmetrical transformer with accurate substrate modeling","authors":"Chuan Wang, H. Liao, Chen Li, Yongzhong Xiong, Ru Huang","doi":"10.1109/RFIC.2008.4561530","DOIUrl":"https://doi.org/10.1109/RFIC.2008.4561530","url":null,"abstract":"A new equivalent circuit model for on-chip symmetrical transformers is presented with all the model elements driven from fabrication specifications. Two extra coupled transformer loops are developed for each coil to calculate the parameters of skin effect, proximity effect and reflective effect of substrate eddy current respectively. Model accuracy is demonstrated by comparing simulated and measured S-parameters, coils inductance, coupling coefficient, and maximum available gain over a wide range of geometry configuration.","PeriodicalId":253375,"journal":{"name":"2008 IEEE Radio Frequency Integrated Circuits Symposium","volume":"71 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2008-07-15","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129473816","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 4
3D group-cross symmetrical inductor: A new inductor architecture with higher self-resonance frequency and Q factor dedicated to advanced HR SOI CMOS technology 3D群交叉对称电感:一种新的电感结构，具有更高的自共振频率和Q因子，专用于先进的HR SOI CMOS技术
2008 IEEE Radio Frequency Integrated Circuits Symposium Pub Date : 2008-07-15 DOI: 10.1109/RFIC.2008.4561476
F. Gianesello, D. Gloria, C. Raynaud, P. Touret, B. Rauber
{"title":"3D group-cross symmetrical inductor: A new inductor architecture with higher self-resonance frequency and Q factor dedicated to advanced HR SOI CMOS technology","authors":"F. Gianesello, D. Gloria, C. Raynaud, P. Touret, B. Rauber","doi":"10.1109/RFIC.2008.4561476","DOIUrl":"https://doi.org/10.1109/RFIC.2008.4561476","url":null,"abstract":"During past years, high resistivity (HR) SOI CMOS technology has emerged as a promising one for the integration of RF applications, mainly because of the improvement of passive component related to HR substrate. In this trend, 3D symmetrical spiral inductor (3DSI) has been proposed on SOI to lower the amount of area consumed by inductor while offering comparable performance than equivalent bulk technology. This paper presents a novel 3D structure group-cross symmetrical spiral inductor (3DGCSI), which has higher self-resonance frequency and quality factor, but has the same DC inductance and occupies the same layout area as 3DSI. Measurement data of 3DGCSI and 3DSI are compared with each other to show the advantages of this new inductor structure.","PeriodicalId":253375,"journal":{"name":"2008 IEEE Radio Frequency Integrated Circuits Symposium","volume":"64 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2008-07-15","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"133008901","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 3
A broadband low-noise single-ended input differential output amplifier with IM2 cancelling 带IM2对消的宽带低噪声单端输入差分输出放大器
2008 IEEE Radio Frequency Integrated Circuits Symposium Pub Date : 2008-07-15 DOI: 10.1109/RFIC.2008.4561390
D. Manstretta
{"title":"A broadband low-noise single-ended input differential output amplifier with IM2 cancelling","authors":"D. Manstretta","doi":"10.1109/RFIC.2008.4561390","DOIUrl":"https://doi.org/10.1109/RFIC.2008.4561390","url":null,"abstract":"A broadband single-ended input differential output low noise amplifier exploiting IM2 cancelling has been designed in a 90 nm CMOS technology. A feedback path from the common mode output to the input effectively cancels the second order distortion products with negligible effect on the noise performance. The measured IIP2 varies from 17 dBm with the feedback disabled to 35 dBm when the feedback is enabled. Measured gain and noise figure are respectively 10 dB and 5 dB on a single output with 50 Omega load while dissipating 7.5 mW.","PeriodicalId":253375,"journal":{"name":"2008 IEEE Radio Frequency Integrated Circuits Symposium","volume":"64 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2008-07-15","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114921022","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 14
A compact and power efficient local oscillator generation and distribution system for complex multi radio systems 一个紧凑和功率高效的本地振荡器产生和分配系统的复杂的多无线电系统
2008 IEEE Radio Frequency Integrated Circuits Symposium Pub Date : 2008-07-15 DOI: 10.1109/RFIC.2008.4561435
R. Roufoogaran, T. Li, A. Ojo, S. Cheng, C.P. Lee, S. Mahadeva, P. Shetter, A. Behzad
{"title":"A compact and power efficient local oscillator generation and distribution system for complex multi radio systems","authors":"R. Roufoogaran, T. Li, A. Ojo, S. Cheng, C.P. Lee, S. Mahadeva, P. Shetter, A. Behzad","doi":"10.1109/RFIC.2008.4561435","DOIUrl":"https://doi.org/10.1109/RFIC.2008.4561435","url":null,"abstract":"A 65 nm, 0.53 mm^2, CMOS multi-radio-frequency local oscillator (LO) generation and distribution system utilizes single phase routings, a single VCO, and smaller Q inductors (compensated by a negative R stage) to reduce area, quadrature coupling, and power consumption. The LO amplitude, IQ imbalances and current consumption are adjusted dynamically by an automatic control loop (ACL) in order to maintain optimum performance. This work results in 60% area and 50% power savings relative to prior implementation while maintaining the optimized performances [4].","PeriodicalId":253375,"journal":{"name":"2008 IEEE Radio Frequency Integrated Circuits Symposium","volume":"154 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2008-07-15","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"116443783","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 5
A 0.13μm CMOS 4-channel UWB timed array transmitter chipset with sub-200ps switches and all-digital timing circuitry 一种0.13μm CMOS 4通道UWB定时阵列发射机芯片组，具有低于200ps的开关和全数字定时电路
2008 IEEE Radio Frequency Integrated Circuits Symposium Pub Date : 2008-07-15 DOI: 10.1109/RFIC.2008.4561509
Z. Safarian, Ta-Shun Chu, H. Hashemi
{"title":"A 0.13μm CMOS 4-channel UWB timed array transmitter chipset with sub-200ps switches and all-digital timing circuitry","authors":"Z. Safarian, Ta-Shun Chu, H. Hashemi","doi":"10.1109/RFIC.2008.4561509","DOIUrl":"https://doi.org/10.1109/RFIC.2008.4561509","url":null,"abstract":"A 4-channel ultra wideband timed array transmitter chipset is reported in 0.13 mum CMOS technology that is suitable for radar and imaging applications. It consists of an all-digital timing control and impulse generation circuitry chip and a set of UWB pulse forming switches. The all-digital chip creates desired delayed versions of an input pulse sequence, which may be coded and/or pulse position modulated, for all 4 channels. It also converts the input pulse sequence to an impulse sequence. The all-digital chip can be directly connected to an antenna array to generate non-carrier based (impulse) waveforms. It can also control the timing of UWB pulse forming switches that are connected to an antenna array to generate carrier based (pulsed sinusoid) waveforms. The delay difference resolution and maximum delay difference between the impulse sequences at adjacent channels are 180ps and 880ps, respectively. The UWB pulse forming switches achieve sub-200ps rise/fall time with isolation higher than 40dB and insertion loss better than 4dB between DC-6GHz. The proposed UWB timed array architecture eliminates the need for area and power hungry true time delay circuitry that would have been otherwise needed for beam-forming.","PeriodicalId":253375,"journal":{"name":"2008 IEEE Radio Frequency Integrated Circuits Symposium","volume":"67 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2008-07-15","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"116482993","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 15
High power GaN-HEMT microwave switches for X-Band and wideband applications 用于x波段和宽带应用的高功率GaN-HEMT微波开关
2008 IEEE Radio Frequency Integrated Circuits Symposium Pub Date : 2008-07-15 DOI: 10.1109/RFIC.2008.4561447
A. Bettidi, A. Cetronio, M. De Dominicis, G. Giolo, C. Lanzieri, A. Manna, M. Peroni, C. Proietti, P. Romanini
{"title":"High power GaN-HEMT microwave switches for X-Band and wideband applications","authors":"A. Bettidi, A. Cetronio, M. De Dominicis, G. Giolo, C. Lanzieri, A. Manna, M. Peroni, C. Proietti, P. Romanini","doi":"10.1109/RFIC.2008.4561447","DOIUrl":"https://doi.org/10.1109/RFIC.2008.4561447","url":null,"abstract":"In this article the design, fabrication and test of X-band and 2-18 GHz wideband high power SPDT MMIC switches in GaN technology are presented. Said switches have demonstrated state-of-the-art performance and RF fabrication yields better than 65%. In particular the X-band switch exhibits an on-state power handling capability of better than 37 dBm at the 1 dB insertion loss compression point and the wideband switch shows an insertion loss compression of 1 dB for input power higher than 34.3 dBm in the entire bandwidth.","PeriodicalId":253375,"journal":{"name":"2008 IEEE Radio Frequency Integrated Circuits Symposium","volume":"51 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2008-07-15","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115052644","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 21
A stage-bypass SOI-CMOS switch for multi-mode multi-band applications 一种用于多模式多频带应用的级旁路SOI-CMOS开关
2008 IEEE Radio Frequency Integrated Circuits Symposium Pub Date : 2008-07-15 DOI: 10.1109/RFIC.2008.4561446
A. Scuderi, C. Presti, F. Carrara, B. Rauber, G. Palmisano
{"title":"A stage-bypass SOI-CMOS switch for multi-mode multi-band applications","authors":"A. Scuderi, C. Presti, F. Carrara, B. Rauber, G. Palmisano","doi":"10.1109/RFIC.2008.4561446","DOIUrl":"https://doi.org/10.1109/RFIC.2008.4561446","url":null,"abstract":"A double-pole double-throw SOI CMOS switch is presented, which can be exploited to bypass a power stage in a radio transmitter with the aim of improving efficiency in applications requiring transmit power control. The switch is designed through transistors stacking. It is able to manage up to a 35 dBm input power with less than 0.35 dB insertion loss from 500 MHz through 3 GHz. A series-shunt topology allows a better than 40 dB isolation to be obtained in high-power mode. Wide bandwidth and high linearity make the switch suitable for multi-standard front end.","PeriodicalId":253375,"journal":{"name":"2008 IEEE Radio Frequency Integrated Circuits Symposium","volume":"47 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2008-07-15","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"133769315","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 13
UWB antenna diplexer with mode conversion using high quality passive and active technology 采用高质量无源和有源技术进行模式转换的超宽带天线双工器
2008 IEEE Radio Frequency Integrated Circuits Symposium Pub Date : 2008-07-15 DOI: 10.1109/RFIC.2008.4561508
M. Gamal El Din, K. Mertens, B. Geck, H. Eul
{"title":"UWB antenna diplexer with mode conversion using high quality passive and active technology","authors":"M. Gamal El Din, K. Mertens, B. Geck, H. Eul","doi":"10.1109/RFIC.2008.4561508","DOIUrl":"https://doi.org/10.1109/RFIC.2008.4561508","url":null,"abstract":"This paper presents an UWB antenna diplexer chip fabricated using high quality passive and active Si-Cu (P7MI) technology. This antenna diplexer has three functions, the main function is filtering for two band groups, the second function is matching between two impedance levels and the third function is differential to single ended mode conversion. This chip together with multichip packaging module technique enables a dual band group WiMedia UWB radio on full silicon RFIC. The diplexer is based on two 6th order elliptic filters. The simulated diplexer has an insertion loss of 3.5 dB in both bands and common mode suppression of around 15 dB for the low band and around 20 dB for the high band. The chip size is 1.65 mm times 1.65 mm.","PeriodicalId":253375,"journal":{"name":"2008 IEEE Radio Frequency Integrated Circuits Symposium","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2008-07-15","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129334059","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Characterization and modeling of Asymmetric LDD MOSFET for 65nm CMOS RF Power Amplifier design 用于65nm CMOS射频功率放大器设计的非对称LDD MOSFET的表征和建模
2008 IEEE Radio Frequency Integrated Circuits Symposium Pub Date : 2008-07-15 DOI: 10.1109/RFIC.2008.4561432
Kai-ye Huang, Po-Chih Wang, M. Hung, Yuh-Sheng Jean, T. Yeh, Ying-Hsi Lin
{"title":"Characterization and modeling of Asymmetric LDD MOSFET for 65nm CMOS RF Power Amplifier design","authors":"Kai-ye Huang, Po-Chih Wang, M. Hung, Yuh-Sheng Jean, T. Yeh, Ying-Hsi Lin","doi":"10.1109/RFIC.2008.4561432","DOIUrl":"https://doi.org/10.1109/RFIC.2008.4561432","url":null,"abstract":"This study demonstrates an RF active device based on A-LDD (asymmetric lightly doped drain) MOSFET structure which has higher drain to gate and drain to source breakdown voltage due to removing LDD and halo doped region from the drain side. It is suitable to be used in RF PA (power amplifier) design for SoC (system on chip) in advance 65 nm node and below technology. The manufacturing of A-LDD MOSFET is compatible with standard CMOS process and no extra mask required. A RF macro model of A-LDD MOSFET is proposed by combining a bias dependent series resistance sub-circuit with BSIM4 MOS model. Besides, a cascode PA composed of A-LDD device was designed and simulated. It shows better RF power performance due to the shorter channel and the larger supply voltage are allowed for A-LDD device compared with conventional one.","PeriodicalId":253375,"journal":{"name":"2008 IEEE Radio Frequency Integrated Circuits Symposium","volume":"58 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2008-07-15","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"125169521","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 4
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