Characterization and modeling of Asymmetric LDD MOSFET for 65nm CMOS RF Power Amplifier design

Abstract

This study demonstrates an RF active device based on A-LDD (asymmetric lightly doped drain) MOSFET structure which has higher drain to gate and drain to source breakdown voltage due to removing LDD and halo doped region from the drain side. It is suitable to be used in RF PA (power amplifier) design for SoC (system on chip) in advance 65 nm node and below technology. The manufacturing of A-LDD MOSFET is compatible with standard CMOS process and no extra mask required. A RF macro model of A-LDD MOSFET is proposed by combining a bias dependent series resistance sub-circuit with BSIM4 MOS model. Besides, a cascode PA composed of A-LDD device was designed and simulated. It shows better RF power performance due to the shorter channel and the larger supply voltage are allowed for A-LDD device compared with conventional one.