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2008 IEEE Radio Frequency Integrated Circuits Symposium最新文献

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A low spurious 400M–6GHz SiGe-MMIC Direct Conversion Transceiver using 2ƒLO LO switching configuration for cognitive radio 低杂散400M-6GHz SiGe-MMIC直接转换收发器，使用2ƒLO LO交换配置用于认知无线电
2008 IEEE Radio Frequency Integrated Circuits Symposium Pub Date : 2008-07-15 DOI: 10.1109/RFIC.2008.4561505
K. Tsutsumi, F. Onoma, J. Koide, M. Uesugi, N. Suematsu, H. Harada
{"title":"A low spurious 400M–6GHz SiGe-MMIC Direct Conversion Transceiver using 2ƒLO LO switching configuration for cognitive radio","authors":"K. Tsutsumi, F. Onoma, J. Koide, M. Uesugi, N. Suematsu, H. Harada","doi":"10.1109/RFIC.2008.4561505","DOIUrl":"https://doi.org/10.1109/RFIC.2008.4561505","url":null,"abstract":"A low spurious SiGe-MMIC direct conversion transceiver using 2fLO LO switching configuration for cognitive radio is described. In the proposed configuration, LO signals for Tx and Rx blocks are generated by frequency divider behind switching circuits. By applying this configuration to the transceiver, the offset frequency of maximum Tx spurious in FDD mode is doubled compared to the conventional configuration. Also, theoretical analysis shows that the proposed configuration can lower LO signal spurious level by 12 dB. Through these effects, receiver sensitivity degradation by Tx signal can be avoided and required characteristics of Tx BPF is relaxed. The direct conversion transceiver MMIC using 2fLO LO switching configuration is fabricated in 0.18 mum SiGe-BiCMOS process. Measured results show a high modulation accuracy over 400 M-6 GHz, and low Tx spurious characteristics.","PeriodicalId":253375,"journal":{"name":"2008 IEEE Radio Frequency Integrated Circuits Symposium","volume":"22 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2008-07-15","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"125906836","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 3
A 2mW 400MHz RF transceiver SoC in 0.18um CMOS technology for wireless medical applications 用于无线医疗应用的2mW 400MHz射频收发器SoC采用0.18um CMOS技术
2008 IEEE Radio Frequency Integrated Circuits Symposium Pub Date : 2008-07-15 DOI: 10.1109/RFIC.2008.4561437
M. Nezhad-Ahmadi, G. Weale, A. El-agha, D. Griesdorf, G. Tumbush, A. Hollinger, M. Matthey, H. Meiners, S. Asgaran
{"title":"A 2mW 400MHz RF transceiver SoC in 0.18um CMOS technology for wireless medical applications","authors":"M. Nezhad-Ahmadi, G. Weale, A. El-agha, D. Griesdorf, G. Tumbush, A. Hollinger, M. Matthey, H. Meiners, S. Asgaran","doi":"10.1109/RFIC.2008.4561437","DOIUrl":"https://doi.org/10.1109/RFIC.2008.4561437","url":null,"abstract":"An ultra low power 400 MHz 128 kbps-FSK RF transceiver SoC which consumes less than 2 mA from a 1 V supply was implemented in a 0.18 mum CMOS technology for wireless medical applications and applied to a wireless hearing aid communication system, a new generation of hearing aid device. The transceiver was implemented fully differentially and directly matched to a non-50ohm miniaturized dipole antenna. The receiver sensitivity of -93 dBm (BER=10-3) was measured for 128 Kbps data rate. The transceiver architecture has the ability of selection of image band in receive mode and transmitting in the image band in transmit mode. The whole RF transceiver including digital modulator and demodulator occupies a die area of less than 2.6 mm2.","PeriodicalId":253375,"journal":{"name":"2008 IEEE Radio Frequency Integrated Circuits Symposium","volume":"46 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2008-07-15","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123936578","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 23
A resistively degenerated wide-band passive mixer with low noise figure and +60dBm IIP2 in 0.18μm CMOS 基于0.18μm CMOS的低噪声、+60dBm IIP2的阻性退化宽带无源混频器
2008 IEEE Radio Frequency Integrated Circuits Symposium Pub Date : 2008-07-15 DOI: 10.1109/RFIC.2008.4561414
Namsoo Kim, V. Aparin, L. Larson
{"title":"A resistively degenerated wide-band passive mixer with low noise figure and +60dBm IIP2 in 0.18μm CMOS","authors":"Namsoo Kim, V. Aparin, L. Larson","doi":"10.1109/RFIC.2008.4561414","DOIUrl":"https://doi.org/10.1109/RFIC.2008.4561414","url":null,"abstract":"This paper presents a wide-band CMOS passive mixer with 8 dB double side band (DSB) noise figure (NF) and 24 dB voltage gain with +60 dBm of uncalibrated IIP2 and +9 dBm of IIP3 at 2 GHz. The linearity is maintained for a wide frequency offset range to ensure interferer performance for in-band jammers. A source degeneration method to improve NF and linearity is introduced and analyzed. Gm boosting methods, such as input cross-coupling, current reuse, complementary input, and back gate connection, are used. The Mixer consumes only 10 mW from a 2V power supply for I and Q both channels including trans-impedance amplifier stages (TIA).","PeriodicalId":253375,"journal":{"name":"2008 IEEE Radio Frequency Integrated Circuits Symposium","volume":"21 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2008-07-15","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"121111568","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 21
A fully integrated 1.175-to-2GHz frequency synthesizer with constant bandwidth for DVB-T applications 完全集成的1.175至2ghz频率合成器，具有恒定带宽，适用于DVB-T应用
2008 IEEE Radio Frequency Integrated Circuits Symposium Pub Date : 2008-07-15 DOI: 10.1109/RFIC.2008.4561441
Lei Lu, Lu Yuan, Hao Min, Zhangwen Tang
{"title":"A fully integrated 1.175-to-2GHz frequency synthesizer with constant bandwidth for DVB-T applications","authors":"Lei Lu, Lu Yuan, Hao Min, Zhangwen Tang","doi":"10.1109/RFIC.2008.4561441","DOIUrl":"https://doi.org/10.1109/RFIC.2008.4561441","url":null,"abstract":"A fully integrated 1.175 to 2 GHz differentially tuned frequency synthesizer aimed for DVB-T tuners is implemented in 0.18-mum CMOS. Techniques are proposed to make the loop bandwidth constant across the whole output frequency range to maintain phase noise optimization and loop stability. It exhibits in-band phase noise of -97.6 dBc/Hz at 10 kHz offset and integrated phase error of 0.63deg from 100 Hz to 10 MHz. The chip draws 10 mA from a 1.8 V supply while occupying 2.6 mm2 die area.","PeriodicalId":253375,"journal":{"name":"2008 IEEE Radio Frequency Integrated Circuits Symposium","volume":"97 4 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2008-07-15","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115701311","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 9
(Invited) mm-wave silicon ICs: An opportunity for holistic design (特邀)毫米波硅集成电路:整体设计的机会
2008 IEEE Radio Frequency Integrated Circuits Symposium Pub Date : 2008-07-15 DOI: 10.1109/RFIC.2008.4561453
A. Hajimiri
{"title":"(Invited) mm-wave silicon ICs: An opportunity for holistic design","authors":"A. Hajimiri","doi":"10.1109/RFIC.2008.4561453","DOIUrl":"https://doi.org/10.1109/RFIC.2008.4561453","url":null,"abstract":"Millimeter-waves integrated circuits offer a unique opportunity for a holistic design approach encompassing RF, analog, and digital, as well as radiation and electromagnetics. The ability to deal with the complete system from the digital circuitry to on-chip antennas and everything in between offers unparalleled opportunities for completely new architectures and topologies, previously impossible due the traditional partitioning of various blocks in conventional design. This opens a plethora of new architectural and system level innovation within the integrated circuit platform. This paper reviews some of the challenges and opportunities for mm-wave ICs and presents several solutions to them.","PeriodicalId":253375,"journal":{"name":"2008 IEEE Radio Frequency Integrated Circuits Symposium","volume":"12 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2008-07-15","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131224832","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 12
A 71–76 GHz CMOS variable gain amplifier using current steering technique 采用电流转向技术的71-76 GHz CMOS变增益放大器
2008 IEEE Radio Frequency Integrated Circuits Symposium Pub Date : 2008-07-15 DOI: 10.1109/RFIC.2008.4561511
Che-Chung Kuo, Zuo‐Min Tsai, Jeng‐Han Tsai, Huei Wang
{"title":"A 71–76 GHz CMOS variable gain amplifier using current steering technique","authors":"Che-Chung Kuo, Zuo‐Min Tsai, Jeng‐Han Tsai, Huei Wang","doi":"10.1109/RFIC.2008.4561511","DOIUrl":"https://doi.org/10.1109/RFIC.2008.4561511","url":null,"abstract":"A 71-76 GHz high dynamic range CMOS RF variable gain amplifier (VGA) is presented. Variable gain is achieved using two current-steering trans-conductance stages, which provide high linearity with relatively low power consumption. The circuit is fabricated in a MS/RF 90-nm CMOS technology and consumes 18-mA total current from a 2-V supply. This VGA achieves a 14-dB maximum gain, a 30-dB gain controlled range, and a 4-dBm output saturation power. To the authorpsilas knowledge, this VGA demonstrates the highest operation frequency among the reported CMOS VGAs.","PeriodicalId":253375,"journal":{"name":"2008 IEEE Radio Frequency Integrated Circuits Symposium","volume":"35 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2008-07-15","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"126598209","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 42
An on-chip dipole antenna for millimeter-wave transmitters 用于毫米波发射机的片上偶极天线
2008 IEEE Radio Frequency Integrated Circuits Symposium Pub Date : 2008-07-15 DOI: 10.1109/RFIC.2008.4561516
Paul Park, S. Wong
{"title":"An on-chip dipole antenna for millimeter-wave transmitters","authors":"Paul Park, S. Wong","doi":"10.1109/RFIC.2008.4561516","DOIUrl":"https://doi.org/10.1109/RFIC.2008.4561516","url":null,"abstract":"This paper presents an on-chip dipole antenna that radiates power directly from the die at millimeter-wave frequencies. To improve the transmission efficiency, a rectangular silicon ldquolensrdquo is attached on top of the chip. This increases the antenna gain in the upward direction by 8~13 dB, while suppressing backside radiation. A 28-GHz prototype CMOS transmitter has been demonstrated by integrating this antenna with a standing-wave oscillator.","PeriodicalId":253375,"journal":{"name":"2008 IEEE Radio Frequency Integrated Circuits Symposium","volume":"210 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2008-07-15","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114327262","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 15
A derived physically expressive circuit model for integrated passives in RFIC RFIC中集成无源的派生物理表达电路模型
2008 IEEE Radio Frequency Integrated Circuits Symposium Pub Date : 2008-07-15 DOI: 10.1109/RFIC.2008.4561477
Kai Yang, Hai Hu, Ke-Li Wu, W. Yin
{"title":"A derived physically expressive circuit model for integrated passives in RFIC","authors":"Kai Yang, Hai Hu, Ke-Li Wu, W. Yin","doi":"10.1109/RFIC.2008.4561477","DOIUrl":"https://doi.org/10.1109/RFIC.2008.4561477","url":null,"abstract":"A systematic derived circuit model for integrated passives in RFICs is presented in this paper. This generic concise circuit model represents clear physical meaning and can be easily plugged into the RFIC design flow. As demonstration examples, the physically meaningful circuit models of a section of coplanar waveguide (CPW) and a square spiral inductor fabricated using 0.18 mum CMOS process are derived. Excellent agreement of the Q performances and the frequency responses of the derived circuit model with those from the measurements can be observed over the frequency range from 0.45 GHz to 10 GHz, demonstrating the validity and the usefulness of this new circuit model extraction approach.","PeriodicalId":253375,"journal":{"name":"2008 IEEE Radio Frequency Integrated Circuits Symposium","volume":"36 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2008-07-15","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114440864","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
Design and analysis of a high-performance cascode bipolar low noise amplifier with shunt feedback capacitor 带并联反馈电容的高性能级联双极低噪声放大器的设计与分析
2008 IEEE Radio Frequency Integrated Circuits Symposium Pub Date : 2008-07-15 DOI: 10.1109/RFIC.2008.4561512
Byoungjoong Kang, Sung-Gi Yang, J. Yu, Wooseung Choo, Byeong-ha Park
{"title":"Design and analysis of a high-performance cascode bipolar low noise amplifier with shunt feedback capacitor","authors":"Byoungjoong Kang, Sung-Gi Yang, J. Yu, Wooseung Choo, Byeong-ha Park","doi":"10.1109/RFIC.2008.4561512","DOIUrl":"https://doi.org/10.1109/RFIC.2008.4561512","url":null,"abstract":"In this paper, a cascode bipolar low noise amplifier (LNA) employing a shunt feedback capacitor is presented, for which the linearity and the noise figure (NF) can be optimized by reducing the transistor size and degeneration inductance. We also show that the second-order interaction, which affects the third-order nonlinearity, becomes insensitive to low-frequency input termination as the DC current increases. Finally, the method of removing the low-frequency trap is presented. The fabricated LNA in 0.35-mum SiGe BiCMOS process showed NF of 0.9 dB with 16-dB power gain and IIP3 of +11 dBm with current consumption of 10 mA from 2.8-V power supply at 900 MHz. The demonstrated LNA satisfies stringent sensitivity and linearity requirement of code-division multiple-access (CDMA) applications quite well.","PeriodicalId":253375,"journal":{"name":"2008 IEEE Radio Frequency Integrated Circuits Symposium","volume":"43 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2008-07-15","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124764036","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 7
60GHz CMOS differential and transformer-coupled power amplifier for compact design 60GHz CMOS差分和变压器耦合功率放大器设计紧凑
2008 IEEE Radio Frequency Integrated Circuits Symposium Pub Date : 2008-07-15 DOI: 10.1109/RFIC.2008.4561387
T. LaRocca, M. Chang
{"title":"60GHz CMOS differential and transformer-coupled power amplifier for compact design","authors":"T. LaRocca, M. Chang","doi":"10.1109/RFIC.2008.4561387","DOIUrl":"https://doi.org/10.1109/RFIC.2008.4561387","url":null,"abstract":"A 57-65 GHz differential and transformer-coupled power amplifier using a commercial 90 nm digital CMOS process is presented. On-chip transformers combine bias, stability and input/interstage matching networks for a compact design with an area of 0.15 mm2. The three-stage amplifier consumes 70 mA under 1.2 V supply voltage. The small-signal gain generally exceeds 15 dB with saturated output power levels over 12 dBm and associated peak power-added efficiency (PAE) greater than 20% (14% across the band).","PeriodicalId":253375,"journal":{"name":"2008 IEEE Radio Frequency Integrated Circuits Symposium","volume":"181 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2008-07-15","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"125070329","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 37
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