{"title":"完全集成的1.175至2ghz频率合成器,具有恒定带宽,适用于DVB-T应用","authors":"Lei Lu, Lu Yuan, Hao Min, Zhangwen Tang","doi":"10.1109/RFIC.2008.4561441","DOIUrl":null,"url":null,"abstract":"A fully integrated 1.175 to 2 GHz differentially tuned frequency synthesizer aimed for DVB-T tuners is implemented in 0.18-mum CMOS. Techniques are proposed to make the loop bandwidth constant across the whole output frequency range to maintain phase noise optimization and loop stability. It exhibits in-band phase noise of -97.6 dBc/Hz at 10 kHz offset and integrated phase error of 0.63deg from 100 Hz to 10 MHz. The chip draws 10 mA from a 1.8 V supply while occupying 2.6 mm2 die area.","PeriodicalId":253375,"journal":{"name":"2008 IEEE Radio Frequency Integrated Circuits Symposium","volume":"97 4 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2008-07-15","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"9","resultStr":"{\"title\":\"A fully integrated 1.175-to-2GHz frequency synthesizer with constant bandwidth for DVB-T applications\",\"authors\":\"Lei Lu, Lu Yuan, Hao Min, Zhangwen Tang\",\"doi\":\"10.1109/RFIC.2008.4561441\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"A fully integrated 1.175 to 2 GHz differentially tuned frequency synthesizer aimed for DVB-T tuners is implemented in 0.18-mum CMOS. Techniques are proposed to make the loop bandwidth constant across the whole output frequency range to maintain phase noise optimization and loop stability. It exhibits in-band phase noise of -97.6 dBc/Hz at 10 kHz offset and integrated phase error of 0.63deg from 100 Hz to 10 MHz. The chip draws 10 mA from a 1.8 V supply while occupying 2.6 mm2 die area.\",\"PeriodicalId\":253375,\"journal\":{\"name\":\"2008 IEEE Radio Frequency Integrated Circuits Symposium\",\"volume\":\"97 4 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2008-07-15\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"9\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2008 IEEE Radio Frequency Integrated Circuits Symposium\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/RFIC.2008.4561441\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2008 IEEE Radio Frequency Integrated Circuits Symposium","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/RFIC.2008.4561441","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
A fully integrated 1.175-to-2GHz frequency synthesizer with constant bandwidth for DVB-T applications
A fully integrated 1.175 to 2 GHz differentially tuned frequency synthesizer aimed for DVB-T tuners is implemented in 0.18-mum CMOS. Techniques are proposed to make the loop bandwidth constant across the whole output frequency range to maintain phase noise optimization and loop stability. It exhibits in-band phase noise of -97.6 dBc/Hz at 10 kHz offset and integrated phase error of 0.63deg from 100 Hz to 10 MHz. The chip draws 10 mA from a 1.8 V supply while occupying 2.6 mm2 die area.