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A ring VCO with wide and linear tuning characteristics for a cognitive radio system 一种用于认知无线电系统的具有宽线性调谐特性的环形压控振荡器
2008 IEEE Radio Frequency Integrated Circuits Symposium Pub Date : 2008-07-15 DOI: 10.1109/RFIC.2008.4561462
Jaehyouk Choi, K. Lim, J. Laskar
{"title":"A ring VCO with wide and linear tuning characteristics for a cognitive radio system","authors":"Jaehyouk Choi, K. Lim, J. Laskar","doi":"10.1109/RFIC.2008.4561462","DOIUrl":"https://doi.org/10.1109/RFIC.2008.4561462","url":null,"abstract":"This paper presents a novel voltage-controlled ring oscillator fabricated in TSMC 0.18-mum CMOS technology. In order to obtain a linear frequency-voltage characteristic over a wide tuning range while maintaining good phase noise performance, a transmission gate was adopted in a saturated-type ring oscillator. The resistance tuning capability of the transmission gate was then theoretically and experimentally analyzed. The proposed ring oscillator achieved a wide operating frequency range from 20 MHz to 807 MHz covering TV channel bands for the cognitive radio spectrum sensing system. The measured phase noise is -108 dBc/Hz at 1-MHz offset from 630 MHz. The power consumption is 22 mW, and core chip area is 60 mum times 51 mum.","PeriodicalId":253375,"journal":{"name":"2008 IEEE Radio Frequency Integrated Circuits Symposium","volume":"22 14 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2008-07-15","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123420287","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 45
A 1GHz bandwidth low-pass ΔΣ ADC with 20GHz to 50GHz adjustable sampling rate 1GHz带宽低通ΔΣ ADC, 20GHz至50GHz可调采样率
2008 IEEE Radio Frequency Integrated Circuits Symposium Pub Date : 2008-07-15 DOI: 10.1109/RFIC.2008.4561413
A. Hart, S. Voinigescu
{"title":"A 1GHz bandwidth low-pass ΔΣ ADC with 20GHz to 50GHz adjustable sampling rate","authors":"A. Hart, S. Voinigescu","doi":"10.1109/RFIC.2008.4561413","DOIUrl":"https://doi.org/10.1109/RFIC.2008.4561413","url":null,"abstract":"This paper presents a wideband continuous-time DeltaSigma-modulator intended for multi-gigabit OFDM receiver applications. Two versions of the circuit were fabricated in a 130-nm SiGe BiCMOS process with 170 GHz fT in order to investigate the effect of finite quantizer gain and delay on dynamic range. The ADC achieves an SNDR of 44.3 dB over a 500 MHz passband and an SNDR of 37.1 dB over a 1 GHz passband while consuming 350 mW from a 2.5 V supply (650 mW including clock distribution).","PeriodicalId":253375,"journal":{"name":"2008 IEEE Radio Frequency Integrated Circuits Symposium","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2008-07-15","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129801108","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 7
A low insertion loss, high linearity, T/R switch in 65 nm bulk CMOS for WLAN 802.11g applications 低插入损耗，高线性度，T/R开关在65nm的批量CMOS WLAN 802.11g应用
2008 IEEE Radio Frequency Integrated Circuits Symposium Pub Date : 2008-07-15 DOI: 10.1109/RFIC.2008.4561529
Yiping Han, K. Carter, L. Larson, A. Behzad
{"title":"A low insertion loss, high linearity, T/R switch in 65 nm bulk CMOS for WLAN 802.11g applications","authors":"Yiping Han, K. Carter, L. Larson, A. Behzad","doi":"10.1109/RFIC.2008.4561529","DOIUrl":"https://doi.org/10.1109/RFIC.2008.4561529","url":null,"abstract":"A transmit-receiver (T/R) switch is fabricated in a 65 nm CMOS process for WLAN 802.11 g applications. By floating the triple well device, the switch achieves low insertion loss, high power handling capability and good linearity simultaneously. In the transmit mode, the switch features 0.8 dB insertion loss, 29 dBm output P1dB and less than 0.2 dB EVM degradation at 24 dBm output power level. In the receive mode, it exhibits 1.6 dB insertion loss and 28 dB isolation at 2.45 GHz.","PeriodicalId":253375,"journal":{"name":"2008 IEEE Radio Frequency Integrated Circuits Symposium","volume":"34 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2008-07-15","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"127531485","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 8
Supply modulators for RF polar transmitters 射频极性发射机的电源调制器
2008 IEEE Radio Frequency Integrated Circuits Symposium Pub Date : 2008-07-15 DOI: 10.1109/RFIC.2008.4561467
J. Kitchen, Connie Chu, S. Kiaei, B. Bakkaloglu
{"title":"Supply modulators for RF polar transmitters","authors":"J. Kitchen, Connie Chu, S. Kiaei, B. Bakkaloglu","doi":"10.1109/RFIC.2008.4561467","DOIUrl":"https://doi.org/10.1109/RFIC.2008.4561467","url":null,"abstract":"This paper summarizes the advantages of PA linearization via polar modulation and illustrates the necessity for high-performance supply modulators in polar transmitters. Two potential modulator solutions are introduced; both having between 4 MHz and 20 MHz occupied RF bandwidth and more than 65 dB SFDR. These modulators process envelope information for 1625 kb/s 8PSK and CDMA IS95 applications in polar PA architectures. The presented circuits and signal processing techniques can be generalized for future modulator designs.","PeriodicalId":253375,"journal":{"name":"2008 IEEE Radio Frequency Integrated Circuits Symposium","volume":"25 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2008-07-15","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"116732809","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 11
The process variability of a V-band LC-VCO in 65nm SOI CMOS v波段LC-VCO在65nm SOI CMOS中的工艺可变性
2008 IEEE Radio Frequency Integrated Circuits Symposium Pub Date : 2008-07-15 DOI: 10.1109/RFIC.2008.4561401
D.D. Kim, Jonghae Kim, Choongyeun Cho
{"title":"The process variability of a V-band LC-VCO in 65nm SOI CMOS","authors":"D.D. Kim, Jonghae Kim, Choongyeun Cho","doi":"10.1109/RFIC.2008.4561401","DOIUrl":"https://doi.org/10.1109/RFIC.2008.4561401","url":null,"abstract":"The process variability of a V-band LC-VCO implemented in 65 nm SOI CMOS is examined. A complementary LC-VCO design, test set up, and measurements are presented. One lot of 300 mm wafers are measured for statistics. There are 8 wafers in the lot, and 67 VCOs per wafer. The VCO frequency tuning range statistics, analog variability against digital benchmark, yield estimation, and intra- vs. inter-wafer variations are analyzed and discussed. The VCO average frequency tuning is 63.7-69.6 GHz, and it shows 90% yield from 65.1 to 67.9 GHz.","PeriodicalId":253375,"journal":{"name":"2008 IEEE Radio Frequency Integrated Circuits Symposium","volume":"127 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2008-07-15","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"127399765","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 2
Linearization of differential CMOS low noise amplifier using cross-coupled post distortion canceller 利用交叉耦合后失真对消器对差分CMOS低噪声放大器进行线性化
2008 IEEE Radio Frequency Integrated Circuits Symposium Pub Date : 2008-07-15 DOI: 10.1109/RFIC.2008.4561391
Tae-Sung Kim, Byung-sung Kim
{"title":"Linearization of differential CMOS low noise amplifier using cross-coupled post distortion canceller","authors":"Tae-Sung Kim, Byung-sung Kim","doi":"10.1109/RFIC.2008.4561391","DOIUrl":"https://doi.org/10.1109/RFIC.2008.4561391","url":null,"abstract":"A post-linearization technique for the differential CMOS LNA is presented. The proposed method uses an additional cross-coupled FET pair which generates the 3rd-order inter-modulation (IM3) current to cancel out the IM3 current of the differential amplifier while minimizing the degradation of noise figure and avoiding the gain reduction. This technique is applied to enhance the linearity of the differential CMOS LNA using 0.18-mum technology. The LNA achieved +10.2-dBm IIP3 with 13.7-dB gain and 1.68-dB NF at 2 GHz consuming 11.8-mA from a 1.8-V supply.","PeriodicalId":253375,"journal":{"name":"2008 IEEE Radio Frequency Integrated Circuits Symposium","volume":"19 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2008-07-15","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122252481","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 22
A 1.2V, 140GHz receiver with on-die antenna in 65nm CMOS 1.2V, 140GHz接收器，65nm CMOS片上天线
2008 IEEE Radio Frequency Integrated Circuits Symposium Pub Date : 2008-07-15 DOI: 10.1109/RFIC.2008.4561424
S. Nicolson, A. Tomkins, K. W. Tang, A. Cathelin, D. Belot, S. Voinigescu
{"title":"A 1.2V, 140GHz receiver with on-die antenna in 65nm CMOS","authors":"S. Nicolson, A. Tomkins, K. W. Tang, A. Cathelin, D. Belot, S. Voinigescu","doi":"10.1109/RFIC.2008.4561424","DOIUrl":"https://doi.org/10.1109/RFIC.2008.4561424","url":null,"abstract":"This paper presents a 1.2 V, 100 mW, 140 GHz receiver with on-die antenna in a 65 nm General Purpose (GP) CMOS process with digital back-end. The receiver has a conversion loss of 15-19 dB in the 100-140 GHz range with 102 GHz LO, and occupies a die area of only 580 mum times 700 mum including pads. The LNA achieves 8 dB gain at 140 GHz, 10 GHz bandwidth, at least -1.8 dBm of saturated output power, and maintains 3 dB gain at 125 degC. The on-chip antenna, which meets all density fill requirements of 65 nm CMOS, has -25 dB gain, and occupies 180 mum times 100 mum of die area. Additionally, design techniques which maximize the millimeter-wave performance of CMOS devices are discussed.","PeriodicalId":253375,"journal":{"name":"2008 IEEE Radio Frequency Integrated Circuits Symposium","volume":"2 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2008-07-15","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"130707711","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 85
On-chip calibration of RF detectors by DC stimuli and artificial neural networks 基于直流刺激和人工神经网络的射频探测器片上标定
2008 IEEE Radio Frequency Integrated Circuits Symposium Pub Date : 2008-07-15 DOI: 10.1109/RFIC.2008.4561502
R. Ramzan, J. Dabrowski
{"title":"On-chip calibration of RF detectors by DC stimuli and artificial neural networks","authors":"R. Ramzan, J. Dabrowski","doi":"10.1109/RFIC.2008.4561502","DOIUrl":"https://doi.org/10.1109/RFIC.2008.4561502","url":null,"abstract":"In the nanometer regime, especially the RF and analog circuits exhibit wide parameter variability, and consequently every chip produced needs to be tested. On-chip design for testability (DfT) features, which are meant to reduce test time and cost also suffer from parameter variability. Therefore, RF calibration of all on-chip test structures is mandatory. In this paper, artificial neural networks (ANN) are employed as multivariate regression technique to architect a general RF calibration scheme using DC- instead of RF stimuli. This relaxes the routing requirements on a chip for GHz test signals along with the reduction in test time and cost. The RF detector, a key element of a radio front-end DfT circuitry, designed in 65 nm CMOS is used to demonstrate the calibration scheme.","PeriodicalId":253375,"journal":{"name":"2008 IEEE Radio Frequency Integrated Circuits Symposium","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2008-07-15","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"130365283","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 9
A 35-GHz differential distributed loss-compensation amplifier 35ghz差分分布式损耗补偿放大器
2008 IEEE Radio Frequency Integrated Circuits Symposium Pub Date : 2008-07-15 DOI: 10.1109/RFIC.2008.4561420
J. Buckwalter
{"title":"A 35-GHz differential distributed loss-compensation amplifier","authors":"J. Buckwalter","doi":"10.1109/RFIC.2008.4561420","DOIUrl":"https://doi.org/10.1109/RFIC.2008.4561420","url":null,"abstract":"The demand for 40+ Gb/s broadband drivers and equalizers for electrical and optical links compels the use of distributed circuit techniques and on-chip loss compensation. A distributed loss-compensation scheme is presented for synthetic transmission lines. The distributed loss-compensated amplifier is implemented in a 120 nm BiCMOS process using only NMOS devices. A 3 dB bandwidth of 35 GHz is measured with gain ripple of +/-1 dB while consuming only 18 mW.","PeriodicalId":253375,"journal":{"name":"2008 IEEE Radio Frequency Integrated Circuits Symposium","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2008-07-15","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"134546415","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 2
A 3 to 5-GHz UWB pulse radio transmitter in 90nm CMOS 一个3至5 ghz超宽带脉冲无线电发射机在90nm CMOS
2008 IEEE Radio Frequency Integrated Circuits Symposium Pub Date : 2008-07-15 DOI: 10.1109/RFIC.2008.4561380
A. Jha, R. Gharpurey, P. Kinget
{"title":"A 3 to 5-GHz UWB pulse radio transmitter in 90nm CMOS","authors":"A. Jha, R. Gharpurey, P. Kinget","doi":"10.1109/RFIC.2008.4561380","DOIUrl":"https://doi.org/10.1109/RFIC.2008.4561380","url":null,"abstract":"We describe a dual conversion, 3-5 GHz UWB pulse radio transmitter architecture using interleaved, IF digital-to-analog converters (DACs) followed by a partial-order hold reconstruction filters that eliminate sampling images, and an RF upconverter. 1.25 nJ is spent per pulse for a pulse-repetition rate (PRR) of 100 MHz while achieving a broadband image cancellation of 42 dBc.","PeriodicalId":253375,"journal":{"name":"2008 IEEE Radio Frequency Integrated Circuits Symposium","volume":"7 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2008-07-15","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131683582","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 9
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