{"title":"A 1GHz bandwidth low-pass ΔΣ ADC with 20GHz to 50GHz adjustable sampling rate","authors":"A. Hart, S. Voinigescu","doi":"10.1109/RFIC.2008.4561413","DOIUrl":null,"url":null,"abstract":"This paper presents a wideband continuous-time DeltaSigma-modulator intended for multi-gigabit OFDM receiver applications. Two versions of the circuit were fabricated in a 130-nm SiGe BiCMOS process with 170 GHz fT in order to investigate the effect of finite quantizer gain and delay on dynamic range. The ADC achieves an SNDR of 44.3 dB over a 500 MHz passband and an SNDR of 37.1 dB over a 1 GHz passband while consuming 350 mW from a 2.5 V supply (650 mW including clock distribution).","PeriodicalId":253375,"journal":{"name":"2008 IEEE Radio Frequency Integrated Circuits Symposium","volume":"1 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2008-07-15","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"7","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2008 IEEE Radio Frequency Integrated Circuits Symposium","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/RFIC.2008.4561413","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 7
Abstract
This paper presents a wideband continuous-time DeltaSigma-modulator intended for multi-gigabit OFDM receiver applications. Two versions of the circuit were fabricated in a 130-nm SiGe BiCMOS process with 170 GHz fT in order to investigate the effect of finite quantizer gain and delay on dynamic range. The ADC achieves an SNDR of 44.3 dB over a 500 MHz passband and an SNDR of 37.1 dB over a 1 GHz passband while consuming 350 mW from a 2.5 V supply (650 mW including clock distribution).