F. Vecchi, M. Repossi, A. Mazzanti, P. Arcioni, F. Svelto
{"title":"A simple and complete circuit model for the coupling between symmetrical spiral inductors in silicon RF-ICs","authors":"F. Vecchi, M. Repossi, A. Mazzanti, P. Arcioni, F. Svelto","doi":"10.1109/RFIC.2008.4561481","DOIUrl":"https://doi.org/10.1109/RFIC.2008.4561481","url":null,"abstract":"Modern RFICs have achieved an impressively high integration level, making cross-coupling effects among different sections of the circuit a potential limit to their functionality. Integrated spiral inductors are a potential source of EM interference. This paper presents a physical equivalent circuit for the accurate wideband modeling of coupling between spiral inductors in CMOS technology, validated by experiments performed on custom test structures. The model proves to be very accurate up to frequencies well above the inductor self-resonance. A simple approximate expression for the mutual inductance is also introduced, useful for the quick estimate of cross talk between different circuit blocks.","PeriodicalId":253375,"journal":{"name":"2008 IEEE Radio Frequency Integrated Circuits Symposium","volume":"28 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2008-07-15","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"132769668","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
B. Geller, A. Hanson, A. Chaudhari, A. Edwards, I. Kizilyalli
{"title":"A broadband low cost GaN-on-silicon MMIC amplifier","authors":"B. Geller, A. Hanson, A. Chaudhari, A. Edwards, I. Kizilyalli","doi":"10.1109/RFIC.2008.4561492","DOIUrl":"https://doi.org/10.1109/RFIC.2008.4561492","url":null,"abstract":"The design and performance of a 0.1 to 5 GHz medium power distributed amplifier is described. The circuit is realized using a low-cost GaN-on-silicon MMIC process featuring 0.5 mum gate length GaN HFETs on a 150 mum thick high resistivity silicon substrate. The circuit was designed using a non-linear FET model and standard passive component models. The first pass circuit demonstrates a saturated output power of 2 W and a maximum efficiency of greater than 30% at 1 GHz at a drain bias of 15 V, and a saturated output power of 3 W and maximum efficiency of 23% at 2.5 GHz with a drain bias of 28 V.","PeriodicalId":253375,"journal":{"name":"2008 IEEE Radio Frequency Integrated Circuits Symposium","volume":"34 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2008-07-15","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131352334","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"A 1.2-V low LO-power 3–5 GHz broadband CMOS folded-switching mixer for UWB receiver","authors":"H.-Y. Wang, K.-F. Wei, J. Lin, H. Chuang","doi":"10.1109/RFIC.2008.4561514","DOIUrl":"https://doi.org/10.1109/RFIC.2008.4561514","url":null,"abstract":"A 1.2-V broadband down-conversion mixer for ultra-wideband (UWB) system applications is presented. The mixer is fabricated in the 0.18-mum 1P6M standard CMOS process. To achieve a low DC power consumption for UWB applications, the LC folded-switching approach is utilized to reduce the supply voltage and the DC power consumption. A CMOS inverter with current-reuse technique is used in the transconductance stage. The shunt-peaking technology is used to achieve wideband frequency response. From 3-5 GHz, the fabricated mixer exhibits a maximum conversion gain of 8.7 dB, maximum IIP3 of -0.65 dBm, LO-RF isolation of about 30 dB, and a dc power consumption of 8.4 mW at 1.2 V power supply.","PeriodicalId":253375,"journal":{"name":"2008 IEEE Radio Frequency Integrated Circuits Symposium","volume":"55 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2008-07-15","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115704921","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"A 24 GHz 4-channel phased-array receiver in 0.13 μm CMOS","authors":"Tiku Yu, Gabriel M. Rebeiz","doi":"10.1109/RFIC.2008.4561454","DOIUrl":"https://doi.org/10.1109/RFIC.2008.4561454","url":null,"abstract":"An integrated 24 GHz 4-channel phased-array receiver front-end is implemented in 0.13 mum CMOS. An All-RF architecture is adopted and results in low power consumption and very small chip area. The active phase shifters are based on two quasi-quadrature vectors and a differential vector modulator. Each phased-array channel has a measured gain of 15 dB for a 2.5 GHz bandwidth, a NF of 6.5 dB, an IIP3 of -13 dBm and an input P1dB of -25 dBm. The measured 16 phase states exhibit < 5deg rms phase error and < 0.5 dB rms gain error at 21-24.5 GHz. Measured S11 and S22 are below -10 dB and -15 dB, respectively, at 15-35 GHz. The entire array consumes 80 mA from a 1.5 V supply and occupies an area of 2.11 x 1.43 mm2 (3 mm2). To our knowledge, this is the first implementation of an All-RF CMOS phased array at mm-wave frequencies and the topology can be easily scaled to a large number of elements (N = 8-16).","PeriodicalId":253375,"journal":{"name":"2008 IEEE Radio Frequency Integrated Circuits Symposium","volume":"58 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2008-07-15","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"116601449","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
E. Laskin, K. W. Tang, K. Yau, P. Chevalier, A. Chantre, B. Sautreuil, S. Voinigescu
{"title":"170-GHz transceiver with on-chip antennas in SiGe technology","authors":"E. Laskin, K. W. Tang, K. Yau, P. Chevalier, A. Chantre, B. Sautreuil, S. Voinigescu","doi":"10.1109/RFIC.2008.4561518","DOIUrl":"https://doi.org/10.1109/RFIC.2008.4561518","url":null,"abstract":"A single-chip transceiver with on-die transmit and receive antennas, Rx and Tx amplifiers, 165-GHz oscillator and static frequency divider is reported in a SiGe HBT process with fT/fMAX of 270 GHz/340 GHz. This marks the highest frequency transceiver in silicon and the highest level of functional integration above 100 GHz in any semiconductor technology. The downconversion gain peaks at -5 dB and the transmit power is -5 dBm when measured at the transceiver pads. Both degrade by approximately 25 dB when measured above the antennas of the transceiver with on-die antennas. The experimental performance of dipole (with and without floating metal strips) and patch antennas is also investigated. The measured 15-dB gain of a standalone amplifier is centered at 170 GHz and remains higher than 10 dB from 160 GHz to 180 GHz while the saturated output power is 0 dBm at 165 GHz.","PeriodicalId":253375,"journal":{"name":"2008 IEEE Radio Frequency Integrated Circuits Symposium","volume":"6 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2008-07-15","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122442659","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
S. Gupta, J. Tellado, S. Begur, F. Yang, M. Inerfield, D. Dabiri, J. Dring, S. Goel, K. Muthukumaraswamy, F. McCarthy, G. Golden, Jiangfeng Wu, S. Arno, S. Kasturia
{"title":"(INVITED) 10GBASE-T for 10Gb/s full duplex ethernet LAN transmission over structured copper cabling","authors":"S. Gupta, J. Tellado, S. Begur, F. Yang, M. Inerfield, D. Dabiri, J. Dring, S. Goel, K. Muthukumaraswamy, F. McCarthy, G. Golden, Jiangfeng Wu, S. Arno, S. Kasturia","doi":"10.1109/RFIC.2008.4561418","DOIUrl":"https://doi.org/10.1109/RFIC.2008.4561418","url":null,"abstract":"This paper reviews key features of the 10 GBASE-T standard for full duplex 10 Gb/s transmission over structured copper cabling in the LAN environment. Tradeoffs in implementing 10 GBASE-T transceivers are discussed. We then present the first implementation of 10 GBASE-T in digital CMOS technology (0.13 mum). This transceiver also supports lower speeds for backward compatibility with legacy Ethernet ports. In 10 GBASE-T mode, the transceiver operates over four pairs of balanced cabling where each pair is driven by an 800 MS/s DAC and each pair has a receiver that includes an active echo cancellation circuit and an 800 MS/sec ADC. The power consumption when operating over a 100 m channel in 10 GBASE-T mode is 10.5 W. The transceiver also includes precoders, crosstalk cancellers, matrix equalizers and an LDPC encoder and decoder.","PeriodicalId":253375,"journal":{"name":"2008 IEEE Radio Frequency Integrated Circuits Symposium","volume":"37 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2008-07-15","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122617376","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
A. Finocchiaro, G. Ferla, G. Girlando, F. Carrara, G. Palmisano
{"title":"A 900-MHz RFID system with TAG-antenna magnetically-coupled to the die","authors":"A. Finocchiaro, G. Ferla, G. Girlando, F. Carrara, G. Palmisano","doi":"10.1109/RFIC.2008.4561436","DOIUrl":"https://doi.org/10.1109/RFIC.2008.4561436","url":null,"abstract":"A novel UHF-RFID system which employs a magnetic coupling between the die of a TAG and its external antenna is presented. With respect to the state-of-the-art, the proposed solution avoids the physical connection between die and antenna, thus significantly improving TAG reliability while reducing assembling costs. Thanks to the integrated spiral, on-wafer wireless testing can be performed thus greatly reducing testing costs. Moreover, the arrangement exploiting the TAG-antenna and its interface to the IC is well-suited to be implemented in a low-cost roll-to-roll process by using conductive inkjet on any dielectric material.","PeriodicalId":253375,"journal":{"name":"2008 IEEE Radio Frequency Integrated Circuits Symposium","volume":"16 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2008-07-15","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"125299052","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
J. Borremans, B. Parvais, M. Dehan, S. Thijs, P. Wambacq, A. Mercha, M. Kuijk, G. Carchon, S. Decoutere
{"title":"Perspective of RF design in future planar and FinFET CMOS","authors":"J. Borremans, B. Parvais, M. Dehan, S. Thijs, P. Wambacq, A. Mercha, M. Kuijk, G. Carchon, S. Decoutere","doi":"10.1109/RFIC.2008.4561389","DOIUrl":"https://doi.org/10.1109/RFIC.2008.4561389","url":null,"abstract":"Scaling of CMOS transistors beyond 45 nm requires architectural redesign of the devices. FinFETs are proposed to recover the reduced channel control. This work evaluates the perspective of RF design in planar bulk vs. FinFET SOI for (sub-)45 nm CMOS on a key RF circuit: a low-noise amplifier (LNA). The planar and FinFET devices with channel lengths down to 40 nm are compared in both wideband and narrowband designs up to 14 GHz to illustrate the RF and ESD protection performance perspective. Planar devices push the RF performance. FinFETs lag somewhat behind, but show promising RF performance.","PeriodicalId":253375,"journal":{"name":"2008 IEEE Radio Frequency Integrated Circuits Symposium","volume":"37 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2008-07-15","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"116799470","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
K. Takahashi, S. Yamanouchi, T. Hirayama, K. Kunihiro
{"title":"An envelope tracking power amplifier using an adaptive biased envelope amplifier for WCDMA handsets","authors":"K. Takahashi, S. Yamanouchi, T. Hirayama, K. Kunihiro","doi":"10.1109/RFIC.2008.4561464","DOIUrl":"https://doi.org/10.1109/RFIC.2008.4561464","url":null,"abstract":"An envelope tracking power amplifier (ET-PA) using a self-oscillation pulse-width-modulation circuit with an adaptive bias technique is presented. In this technique, the supply voltage to the envelope amplifier is changed depending on the output power level. Since this approach enables the envelope amplifier to change the output power without degrading the signal resolution, the developed ET-PA shows a low adjacent channel leakage power ratio (ACPR) of less than -38 dBc in a wide output power range from 10 to 27 dBm. The ET-PA shows 45.4% overall efficiency at peak output power of 28 dBm. The average efficiency was 29%, which is 2.4 times higher than that of a class-AB PA. The noise power in the receive band (Rx noise) is -136 dBm/Hz at output power of 26 dBm at a frequency of 2.14 GHz.","PeriodicalId":253375,"journal":{"name":"2008 IEEE Radio Frequency Integrated Circuits Symposium","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2008-07-15","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"126891994","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Hyung Ki Ahn, Kun-Seok Lee, Hwayeal Yu, Hyoung-Seok Oh, Dong-Jin Keum, Byeong-ha Park
{"title":"VCO gain calibration technique for GSM/EDGE polar modulated transmitter","authors":"Hyung Ki Ahn, Kun-Seok Lee, Hwayeal Yu, Hyoung-Seok Oh, Dong-Jin Keum, Byeong-ha Park","doi":"10.1109/RFIC.2008.4561459","DOIUrl":"https://doi.org/10.1109/RFIC.2008.4561459","url":null,"abstract":"This paper describes a VCO gain calibration technique for the two-point modulation scheme using Delta-Sigma frequency synthesizer. The proposed technique enables PLL-based phase modulator to have wide bandwidth with good signal quality. A fully integrated GSM/EDGE polar modulated transmitter, implemented in a 0.13 mum CMOS process, is presented to show the feasibility of this calibration technique. After the calibration, it shows a margin of 8 dB to the spectrum mask at 400 kHz offset with EVM of 2%.","PeriodicalId":253375,"journal":{"name":"2008 IEEE Radio Frequency Integrated Circuits Symposium","volume":"14 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2008-07-15","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128883195","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}