A 35-GHz differential distributed loss-compensation amplifier

Abstract

The demand for 40+ Gb/s broadband drivers and equalizers for electrical and optical links compels the use of distributed circuit techniques and on-chip loss compensation. A distributed loss-compensation scheme is presented for synthetic transmission lines. The distributed loss-compensated amplifier is implemented in a 120 nm BiCMOS process using only NMOS devices. A 3 dB bandwidth of 35 GHz is measured with gain ripple of +/-1 dB while consuming only 18 mW.