{"title":"35ghz差分分布式损耗补偿放大器","authors":"J. Buckwalter","doi":"10.1109/RFIC.2008.4561420","DOIUrl":null,"url":null,"abstract":"The demand for 40+ Gb/s broadband drivers and equalizers for electrical and optical links compels the use of distributed circuit techniques and on-chip loss compensation. A distributed loss-compensation scheme is presented for synthetic transmission lines. The distributed loss-compensated amplifier is implemented in a 120 nm BiCMOS process using only NMOS devices. A 3 dB bandwidth of 35 GHz is measured with gain ripple of +/-1 dB while consuming only 18 mW.","PeriodicalId":253375,"journal":{"name":"2008 IEEE Radio Frequency Integrated Circuits Symposium","volume":"1 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2008-07-15","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"2","resultStr":"{\"title\":\"A 35-GHz differential distributed loss-compensation amplifier\",\"authors\":\"J. Buckwalter\",\"doi\":\"10.1109/RFIC.2008.4561420\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"The demand for 40+ Gb/s broadband drivers and equalizers for electrical and optical links compels the use of distributed circuit techniques and on-chip loss compensation. A distributed loss-compensation scheme is presented for synthetic transmission lines. The distributed loss-compensated amplifier is implemented in a 120 nm BiCMOS process using only NMOS devices. A 3 dB bandwidth of 35 GHz is measured with gain ripple of +/-1 dB while consuming only 18 mW.\",\"PeriodicalId\":253375,\"journal\":{\"name\":\"2008 IEEE Radio Frequency Integrated Circuits Symposium\",\"volume\":\"1 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2008-07-15\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"2\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2008 IEEE Radio Frequency Integrated Circuits Symposium\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/RFIC.2008.4561420\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2008 IEEE Radio Frequency Integrated Circuits Symposium","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/RFIC.2008.4561420","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
A 35-GHz differential distributed loss-compensation amplifier
The demand for 40+ Gb/s broadband drivers and equalizers for electrical and optical links compels the use of distributed circuit techniques and on-chip loss compensation. A distributed loss-compensation scheme is presented for synthetic transmission lines. The distributed loss-compensated amplifier is implemented in a 120 nm BiCMOS process using only NMOS devices. A 3 dB bandwidth of 35 GHz is measured with gain ripple of +/-1 dB while consuming only 18 mW.