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2008 IEEE Radio Frequency Integrated Circuits Symposium最新文献

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Integration of a cellular handset power amplifier and a DC/DC converter in a Silicon-On-Insulator (SOI) technology 在绝缘体上硅(SOI)技术中集成蜂窝手机功率放大器和DC/DC转换器
2008 IEEE Radio Frequency Integrated Circuits Symposium Pub Date : 2008-07-15 DOI: 10.1109/RFIC.2008.4561466
A. Tombak, R. Baeten, J. Jorgenson, D. Dening
{"title":"Integration of a cellular handset power amplifier and a DC/DC converter in a Silicon-On-Insulator (SOI) technology","authors":"A. Tombak, R. Baeten, J. Jorgenson, D. Dening","doi":"10.1109/RFIC.2008.4561466","DOIUrl":"https://doi.org/10.1109/RFIC.2008.4561466","url":null,"abstract":"A DC/DC buck converter was integrated with a cellular handset power amplifier (PA) in a silicon-on-insulator (SOI) technology. The technology was designed to allow integration of high-performance reliable RF power devices with the front-end. The power devices uses an LDMOS-based MOS device, called integrated power MOS (IPMOS). A 3-stage power amplifier was designed for GSM850/900 and DCS/PCS bands. The PA achieved typical power added efficiencies (PAE) greater than 60% with Pout ranging from 35.5 to 36.7 dBm at GSM850/900 MHz band, and it achieved typical PAEs in the range of 44 to 49 % with Pout ranging from 33.6 to 33.8 dBm at DCS/PCS band. The PAE was also measured when the DC/DC converter biased the PA. Up to 25-percentage-point improvement in the PAE was observed compared to the case where the output power was controlled by varying the input power. The spurious emissions in the transmit band and the receive band noise were also reported.","PeriodicalId":253375,"journal":{"name":"2008 IEEE Radio Frequency Integrated Circuits Symposium","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2008-07-15","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"125680559","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 20
Broadband variable passive delay elements based on an inductance multiplication technique 基于电感倍增技术的宽带可变无源延迟元件
2008 IEEE Radio Frequency Integrated Circuits Symposium Pub Date : 2008-07-15 DOI: 10.1109/RFIC.2008.4561473
E. Adabi, A. Niknejad
{"title":"Broadband variable passive delay elements based on an inductance multiplication technique","authors":"E. Adabi, A. Niknejad","doi":"10.1109/RFIC.2008.4561473","DOIUrl":"https://doi.org/10.1109/RFIC.2008.4561473","url":null,"abstract":"A new technique for making broadband and variable passive delay elements is described. By introducing a variable inductance structure and using it along with available varactors, synthesized transmission lines are implemented with variable delay while maintaining a constant Zo over the line bandwidth. Inductance tuning is realized through the effect of mutual inductance. As a demonstration prototype, a single unit cell and two cascaded unit cells were implemented in 90 nm digital CMOS process. Delay values ranging from 14 ps - 40 ps were obtained from DC to 8 GHz while maintaining matched condition over the bandwidth with delay variations of less than plusmn%5. These delay cells could be used in broadband impulse-based beamforming systems to provide variable delays in each RF path.","PeriodicalId":253375,"journal":{"name":"2008 IEEE Radio Frequency Integrated Circuits Symposium","volume":"464 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2008-07-15","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"127538207","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 34
Effects of forward body biasing on the high frequency noise in deep submicron NMOSFETs 前向体偏置对深亚微米nmosfet高频噪声的影响
2008 IEEE Radio Frequency Integrated Circuits Symposium Pub Date : 2008-07-15 DOI: 10.1109/RFIC.2008.4561501
Hao Su, Hong Wang, T. Xu, R. Zeng
{"title":"Effects of forward body biasing on the high frequency noise in deep submicron NMOSFETs","authors":"Hao Su, Hong Wang, T. Xu, R. Zeng","doi":"10.1109/RFIC.2008.4561501","DOIUrl":"https://doi.org/10.1109/RFIC.2008.4561501","url":null,"abstract":"In this paper, the impact of forward body biasing on the high frequency noise in deep sub-micrometer NMOSFETs is presented. Experimental results show that high frequency noise is increased with the body bias Vb, and have a positive dependence on the substrate bias. Possible mechanism behind the increase in RF noise of MOSFET under the forward body bias is studied. The increase of NFmin and Rn with the increase in Vb may appear as a great concern for the application of forward body bias scheme in the low noise circuit design.","PeriodicalId":253375,"journal":{"name":"2008 IEEE Radio Frequency Integrated Circuits Symposium","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2008-07-15","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"132023405","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 2
Frequency dividers with enhanced locking range 具有增强锁定范围的分频器
2008 IEEE Radio Frequency Integrated Circuits Symposium Pub Date : 2008-07-15 DOI: 10.1109/RFIC.2008.4561524
Kun-Hung Tsai, Jia-Hao Wu, Shen-Iuan Liu
{"title":"Frequency dividers with enhanced locking range","authors":"Kun-Hung Tsai, Jia-Hao Wu, Shen-Iuan Liu","doi":"10.1109/RFIC.2008.4561524","DOIUrl":"https://doi.org/10.1109/RFIC.2008.4561524","url":null,"abstract":"The locking range of the CML divide-by-two divider with the inductive shunt peaking is analyzed. The dividers using the locking-range-enhanced techniques have been realized in 0.13 mum CMOS process. Experimental results show that the locking range of the proposed divider is improved 30.8% and 62.5% by adopting the current-reused and the gm-boosted technique, respectively. When both techniques are adopted, the locking range is 101.67% larger than the conventional one at the same power consumption. The maximum locking range of the proposed divider is from 46.22 to 48.64 GHz while the input power level is -4 dbm.","PeriodicalId":253375,"journal":{"name":"2008 IEEE Radio Frequency Integrated Circuits Symposium","volume":"15 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2008-07-15","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"132258338","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 6
Current reuse cross-coupling CMOS VCO using the center-tapped transformer in LC tank for digitally controlled oscillator 电流复用交叉耦合CMOS压控振荡器采用LC槽中心抽头变压器作为数字控制振荡器
2008 IEEE Radio Frequency Integrated Circuits Symposium Pub Date : 2008-07-15 DOI: 10.1109/RFIC.2008.4561497
Youngjae Lee, Seok-Bong Hyun, Cheonsoo Kim
{"title":"Current reuse cross-coupling CMOS VCO using the center-tapped transformer in LC tank for digitally controlled oscillator","authors":"Youngjae Lee, Seok-Bong Hyun, Cheonsoo Kim","doi":"10.1109/RFIC.2008.4561497","DOIUrl":"https://doi.org/10.1109/RFIC.2008.4561497","url":null,"abstract":"A current reuse cross-coupling transformer-based VCO with low phase noise and low power consumption was implemented in 0.13 mum CMOS. The oscillation frequency was tuned from 4.6 GHz to 6 GHz (26% tuning range) using two different-sized varactor that adjusted fine and coarse tuning. The measured phase noise at 5.0 GHz was -124 dBc/Hz (1 MHz offset) and maximum output power level was -5.5 dBm. The 0.4times0.3 mm2 core consumes very low power of 1.8 mW for 1.2 V and FOM has -196.2 dB.","PeriodicalId":253375,"journal":{"name":"2008 IEEE Radio Frequency Integrated Circuits Symposium","volume":"36 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2008-07-15","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123983584","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 5
A low-voltage high-frequency CMOS LC-VCO using a transformer feedback 采用变压器反馈的低压高频CMOS LC-VCO
2008 IEEE Radio Frequency Integrated Circuits Symposium Pub Date : 2008-07-15 DOI: 10.1109/RFIC.2008.4561496
C. Chang, Ching-Yuan Yang
{"title":"A low-voltage high-frequency CMOS LC-VCO using a transformer feedback","authors":"C. Chang, Ching-Yuan Yang","doi":"10.1109/RFIC.2008.4561496","DOIUrl":"https://doi.org/10.1109/RFIC.2008.4561496","url":null,"abstract":"The paper describes a 0.18-mum CMOS 8.5-GHz LC-tank VCO using a technique of reducing parasitic capacitances. Compared to the traditional crossed coupled method with more parasitic capacitances, in this work a symmetry transformer introduced by a transformer on feedback currents from the active components is employed to reduce parasitic capacitances in the VCO. The proposed oscillator can easily arrive at the requirement for high-frequency operation with the tuning range of 8.32 to 8.75 GHz (5%) at 0.7 V supply. With operating at 8.5-GHz frequency, the measured phase noise is -121.6 dBc/Hz at 1-MHz offset under the power dissipation of 6 mW.","PeriodicalId":253375,"journal":{"name":"2008 IEEE Radio Frequency Integrated Circuits Symposium","volume":"11 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2008-07-15","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"127875599","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 9
A 12-mW 500-Mb/s 1.8-μm CMOS pulsed UWB transceiver suitable for sub-meter short-range wireless communication 一种适用于亚米短距离无线通信的12mw 500 mb /s 1.8 μm CMOS脉冲超宽带收发器
2008 IEEE Radio Frequency Integrated Circuits Symposium Pub Date : 2008-07-15 DOI: 10.1109/RFIC.2008.4561507
M. Sasaki
{"title":"A 12-mW 500-Mb/s 1.8-μm CMOS pulsed UWB transceiver suitable for sub-meter short-range wireless communication","authors":"M. Sasaki","doi":"10.1109/RFIC.2008.4561507","DOIUrl":"https://doi.org/10.1109/RFIC.2008.4561507","url":null,"abstract":"This paper describes a 500-Mb/s 12-mW pulsed UWB transceiver in 1.8-mum CMOS technology for sub-meter short-range wireless communication. The transceiver employs two functional blocks for reducing power dissipation: one is an on-chip transformer-based DC-RF pulse power converter and another is an asynchronous RF-baseband direct demodulator. The prototype chip with printed dipole antenna can operate at a bit-error rate of 10-3 or less on 40-cm distance, while dissipating less than 24 muW/Mb/s.","PeriodicalId":253375,"journal":{"name":"2008 IEEE Radio Frequency Integrated Circuits Symposium","volume":"20 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2008-07-15","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129041112","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 10
Effect of technology scaling on RF performance of the transistors fabricated by standard CMOS technology 工艺尺度对标准CMOS工艺制造晶体管射频性能的影响
2008 IEEE Radio Frequency Integrated Circuits Symposium Pub Date : 2008-07-15 DOI: 10.1109/RFIC.2008.4561498
Han-Su Kim, Chulho Chung, Joohyun Jeong, Seung-Jae Jung, Jinsung Lim, J. Joe, Jaehoon Park, Hyunwoo Lee, G. Jo, Kangwook Park, Jedon D. Kim, Hansu Oh, J. Yoon
{"title":"Effect of technology scaling on RF performance of the transistors fabricated by standard CMOS technology","authors":"Han-Su Kim, Chulho Chung, Joohyun Jeong, Seung-Jae Jung, Jinsung Lim, J. Joe, Jaehoon Park, Hyunwoo Lee, G. Jo, Kangwook Park, Jedon D. Kim, Hansu Oh, J. Yoon","doi":"10.1109/RFIC.2008.4561498","DOIUrl":"https://doi.org/10.1109/RFIC.2008.4561498","url":null,"abstract":"Cut-off frequency (f<sub>T</sub>) of 300 GHz and 230 GHz for NMOS and PMOS is demonstrated for transistors with a gate length of 35 nm fabricated by 45 nm standard CMOS technology. Current gain (H<sub>21</sub>) and noise (flicker and thermal) is improved with scaling down technology. Power gain (G<sub>u</sub>) increase is slow down and even saturated at 45 nm as technology advances. Such saturation in power gain is attributed to rapid increase in g<sub>ds</sub> (drain conductance). Additional efforts are required to reduce g<sub>ds</sub> for continuous improvement in power gain with the scaling. V<sub>th</sub> optimization can be one of options to achieve better g<sub>ds</sub>.","PeriodicalId":253375,"journal":{"name":"2008 IEEE Radio Frequency Integrated Circuits Symposium","volume":"164 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2008-07-15","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"116878716","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 7
(INVITED) High-performance RF passives using post-CMOS MEMS techniques for RF SoC (特邀)采用后cmos MEMS技术的射频SoC的高性能射频无源
2008 IEEE Radio Frequency Integrated Circuits Symposium Pub Date : 2008-07-15 DOI: 10.1109/RFIC.2008.4561409
Xinxin Li, Lei Gu, Zhengzheng Wu
{"title":"(INVITED) High-performance RF passives using post-CMOS MEMS techniques for RF SoC","authors":"Xinxin Li, Lei Gu, Zhengzheng Wu","doi":"10.1109/RFIC.2008.4561409","DOIUrl":"https://doi.org/10.1109/RFIC.2008.4561409","url":null,"abstract":"Real-world realization of RF SoC has been hindered by the lack of high-performance, compact and tunable RF passive devices that are truly CMOS-compatible. This paper presents advances in low-temperature metal MEMS techniques developed to design and fabricate various high-performance RF passives for post-CMOS integration with RF SoC. Constructed with electroplated metal, the RF MEMS passives are suspended above the low-resistivity silicon substrate to depress both ohmic and substrate losses. The MEMS RF passives presented in this paper include concave-suspended high-Q solenoid inductors and transformers, wide-range tunable capacitors and resonant LC-tanks, etc. Key issues such as electrical, mechanical and reliability performance was discussed. Potential applications in RF mobile devices is outlined.","PeriodicalId":253375,"journal":{"name":"2008 IEEE Radio Frequency Integrated Circuits Symposium","volume":"22 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2008-07-15","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"127535351","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 9
Electromagnetic and Thermal Co-Analysis for distributed co-design and co-simulation of Chip, Package And Board 芯片、封装和电路板分布式协同设计和协同仿真的电磁和热协同分析
2008 IEEE Radio Frequency Integrated Circuits Symposium Pub Date : 2008-07-15 DOI: 10.1109/RFIC.2008.4561479
S. Wane, A. Kuo
{"title":"Electromagnetic and Thermal Co-Analysis for distributed co-design and co-simulation of Chip, Package And Board","authors":"S. Wane, A. Kuo","doi":"10.1109/RFIC.2008.4561479","DOIUrl":"https://doi.org/10.1109/RFIC.2008.4561479","url":null,"abstract":"This paper discusses electromagnetic (EM) and thermal co-analysis for chip, package and board co-design and co-simulation. The limitation of classical divide-and-conquer approaches based on cascading techniques are investigated in reference to global methodologies where chip, package and board are simulated using one single model methodology. Cascade and single model methodologies are applied to a real-world NXP -semiconductors system-in-package carrier product for simultaneous co-design and co-simulation of chip, package and board, the obtained results are compared both for full-wave and quasi-static assumptions. A global use-model combining EM simulation with thermal analysis is proposed towards multi-physics oriented co-design and co-simulation.","PeriodicalId":253375,"journal":{"name":"2008 IEEE Radio Frequency Integrated Circuits Symposium","volume":"15 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2008-07-15","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"125278152","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 9
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