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Design for scaled thin film strained-SOI CMOS devices with higher carrier mobility 具有更高载流子迁移率的缩放薄膜应变soi CMOS器件的设计
Technical digest. International Electron Devices Meeting Pub Date : 2002-12-08 DOI: 10.1109/IEDM.2002.1175772
T. Mizuno, N. Sugiyama, T. Tezuka, T. Numata, T. Maeda, S. Takagi
{"title":"Design for scaled thin film strained-SOI CMOS devices with higher carrier mobility","authors":"T. Mizuno, N. Sugiyama, T. Tezuka, T. Numata, T. Maeda, S. Takagi","doi":"10.1109/IEDM.2002.1175772","DOIUrl":"https://doi.org/10.1109/IEDM.2002.1175772","url":null,"abstract":"Physical mechanisms responsible for the reduction in both electron and hole mobility in thin strained-Si structures of strained-SOI CMOS devices are examined in detail. The slight decrease in electron mobility with thinning strained-Si layers is attributable to the quantum-mechanical confinement effect in strained-Si layers. Also, diffusion of Ge atoms into SiO/sub 2//strained Si interface is found to cause the generation of interface states near valence band edge, leading to the reduction in hole mobility in lower E/sub eff/ region through Coulomb scattering. Based on considerations of these factors affecting mobility, the strained-Si thickness and the Ge content are designed to realize high-speed strained-SOI CMOS under the 65 nm technology and beyond.","PeriodicalId":74909,"journal":{"name":"Technical digest. International Electron Devices Meeting","volume":"1 1","pages":"31-34"},"PeriodicalIF":0.0,"publicationDate":"2002-12-08","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"83045088","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 21
A 90 nm communication technology featuring SiGe HBT transistors, RF CMOS, precision R-L-C RF elements and 1 /spl mu/m2 6-T SRAM cell 90nm通信技术，采用SiGe HBT晶体管、RF CMOS、精密R-L-C RF元件和1 /spl mu/m2 6-T SRAM单元
Technical digest. International Electron Devices Meeting Pub Date : 2002-12-08 DOI: 10.1109/IEDM.2002.1175782
K. Kuhn, M. Agostinelli, S. Ahmed, S. Chambers, S. Cea, S. Christensen, P. Fischer, J. Gong, C. Kardas, T. Letson, L. Henning, A. Murthy, H. Muthali, B. Obradovic, P. Packan, S. Pae, I. Post, S. Putna, K. Raol, A. Roskowski, R. Soman, T. Thomas, P. Vandervoorn, M. Weiss, I. Young
{"title":"A 90 nm communication technology featuring SiGe HBT transistors, RF CMOS, precision R-L-C RF elements and 1 /spl mu/m2 6-T SRAM cell","authors":"K. Kuhn, M. Agostinelli, S. Ahmed, S. Chambers, S. Cea, S. Christensen, P. Fischer, J. Gong, C. Kardas, T. Letson, L. Henning, A. Murthy, H. Muthali, B. Obradovic, P. Packan, S. Pae, I. Post, S. Putna, K. Raol, A. Roskowski, R. Soman, T. Thomas, P. Vandervoorn, M. Weiss, I. Young","doi":"10.1109/IEDM.2002.1175782","DOIUrl":"https://doi.org/10.1109/IEDM.2002.1175782","url":null,"abstract":"This paper presents a highly-manufacturable process technology featuring SiGe HBT devices fully integrated into a 90 nm leading-edge high performance CMOS technology. The technology was developed on a 300 mm wafer platform, and supports process elements including RF CMOS devices, a MIM capacitor, precision resistors, high-Q inductors and varactors.","PeriodicalId":74909,"journal":{"name":"Technical digest. International Electron Devices Meeting","volume":"1 1","pages":"73-76"},"PeriodicalIF":0.0,"publicationDate":"2002-12-08","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"83110512","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 38
Suppression of stress induced open failures between via and Cu wide line by inserting Ti layer under Ta/TaN barrier 通过在Ta/TaN势垒下插入Ti层抑制应力引起的通孔和Cu宽线之间的开口破坏
Technical digest. International Electron Devices Meeting Pub Date : 2002-12-08 DOI: 10.1109/IEDM.2002.1175946
M. Ueki, M. Hiroi, N. Ikarashi, T. Onodera, N. Furutake, M. Yoshiki, Y. Hayashi
{"title":"Suppression of stress induced open failures between via and Cu wide line by inserting Ti layer under Ta/TaN barrier","authors":"M. Ueki, M. Hiroi, N. Ikarashi, T. Onodera, N. Furutake, M. Yoshiki, Y. Hayashi","doi":"10.1109/IEDM.2002.1175946","DOIUrl":"https://doi.org/10.1109/IEDM.2002.1175946","url":null,"abstract":"We verified the effect of Ti layer insertion on stress induced void formation in wide Cu lines where voids were formed under via. In order to improve adhesion property between via and underlying Cu, PVD-Ti was inserted under Ta/TaN barrier. When nominal 30 nm thick PVD-Ti layer was inserted (Ti thickness at via bottom was about 8 nm), the failure was sufficiently suppressed without degrading the electromigration resistance. In addition, the via resistance was reduced by 25% compared with conventional Ta/TaN barrier structure, while the Cu metal resistivity was unchanged by the Ti insertion.","PeriodicalId":74909,"journal":{"name":"Technical digest. International Electron Devices Meeting","volume":"8 1","pages":"749-752"},"PeriodicalIF":0.0,"publicationDate":"2002-12-08","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"83168357","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 11
Fully depleted surrounding gate transistor (SGT) for 70 nm DRAM and beyond 用于70纳米及以上DRAM的完全耗尽的周围栅极晶体管(SGT)
Technical digest. International Electron Devices Meeting Pub Date : 2002-12-08 DOI: 10.1109/IEDM.2002.1175831
B. Goebel, J. Lutzen, D. Manger, P. Moll, K. Mummler, M. Popp, U. Scheler, T. Schlosser, H. Seidl, M. Sesterhenn, S. Slesazeck, S. Tegen
{"title":"Fully depleted surrounding gate transistor (SGT) for 70 nm DRAM and beyond","authors":"B. Goebel, J. Lutzen, D. Manger, P. Moll, K. Mummler, M. Popp, U. Scheler, T. Schlosser, H. Seidl, M. Sesterhenn, S. Slesazeck, S. Tegen","doi":"10.1109/IEDM.2002.1175831","DOIUrl":"https://doi.org/10.1109/IEDM.2002.1175831","url":null,"abstract":"A high performance surrounding gate transistor (SGT) enabling sufficient static and dynamic retention time of future DRAM cells is presented. For the first time, we demonstrate a fully depleted SGT, that shows no reduction of the retention time due to the transient bipolar effect. This effect potentially prevents DRAM application of fully depleted SGTs and is therefore investigated in detail. Based on experimental results, the impact of the proposed SGT on the scalability and performance of future DRAMs is discussed.","PeriodicalId":74909,"journal":{"name":"Technical digest. International Electron Devices Meeting","volume":"6 1","pages":"275-278"},"PeriodicalIF":0.0,"publicationDate":"2002-12-08","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"90523853","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 16
A 0.25/spl mu/m CMOS based 70V smart power technology with deep trench for high-voltage isolation 基于0.25/spl mu/m CMOS的70V智能电源技术，深沟槽高压隔离
Technical digest. International Electron Devices Meeting Pub Date : 2002-12-08 DOI: 10.1109/IEDM.2002.1175878
V. Parthasarathy, R. Zhu, V. Khemka, T. Roggenbauer, A. Bose, P. Hui, P. Rodriquez, J. Nivison, D. Collins, Z. Wu, I. Puchades, M. Butner
{"title":"A 0.25/spl mu/m CMOS based 70V smart power technology with deep trench for high-voltage isolation","authors":"V. Parthasarathy, R. Zhu, V. Khemka, T. Roggenbauer, A. Bose, P. Hui, P. Rodriquez, J. Nivison, D. Collins, Z. Wu, I. Puchades, M. Butner","doi":"10.1109/IEDM.2002.1175878","DOIUrl":"https://doi.org/10.1109/IEDM.2002.1175878","url":null,"abstract":"Presents a 0.25/spl mu/m CMOS based smart power platform on a P++ substrate with a deep trench high-voltage isolation as a low-cost alternative to SOI in realizing significant analog shrink, reduction of substrate parasitics and 70V high-side capability without affecting analog matching and process complexity.","PeriodicalId":74909,"journal":{"name":"Technical digest. International Electron Devices Meeting","volume":"11 3 1","pages":"459-462"},"PeriodicalIF":0.0,"publicationDate":"2002-12-08","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"89743086","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 56
Mechanical stress measurements in damascene copper interconnects and influence on electromigration parameters 大马士革铜互连机械应力测量及其对电迁移参数的影响
Technical digest. International Electron Devices Meeting Pub Date : 2002-12-08 DOI: 10.1109/IEDM.2002.1175945
G. Reimbold, O. Sicardy, L. Arnaud, F. Fillot, J. Torres
{"title":"Mechanical stress measurements in damascene copper interconnects and influence on electromigration parameters","authors":"G. Reimbold, O. Sicardy, L. Arnaud, F. Fillot, J. Torres","doi":"10.1109/IEDM.2002.1175945","DOIUrl":"https://doi.org/10.1109/IEDM.2002.1175945","url":null,"abstract":"This paper presents mechanical stress measurements versus temperature in advanced damascene copper lines with various geometries using synchrotron high flux X-rays. Elasto-plastic behaviour versus temperature is evidenced as well as temperature transitions between tensile and compressive stresses. We discuss the theoretical influence of /spl sigma/(T) on electromigration (EM), lifetime (MTF), and current design rule for the two degradation modes of voids and hillocks. We show that EM extrapolations should be reconsidered. While MTF defined by open failure is weakly affected by mechanical stress conditions, hillock mode failure would lead to a reduction of maximum current density design rule J/sub max/. The prospective impact of low k materials relative to mechanical stress is then addressed.","PeriodicalId":74909,"journal":{"name":"Technical digest. International Electron Devices Meeting","volume":"1 1","pages":"745-748"},"PeriodicalIF":0.0,"publicationDate":"2002-12-08","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"88722280","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 15
A self-assembly conductive device for direct DNA identification in integrated microarray based system 集成微阵列系统中用于DNA直接识别的自组装导电装置
Technical digest. International Electron Devices Meeting Pub Date : 2002-12-08 DOI: 10.1109/IEDM.2002.1175814
M. Xue, Jiong Li, Wen Xu, Zuhong Lu, K. Wang, P. Ko, M. Chan
{"title":"A self-assembly conductive device for direct DNA identification in integrated microarray based system","authors":"M. Xue, Jiong Li, Wen Xu, Zuhong Lu, K. Wang, P. Ko, M. Chan","doi":"10.1109/IEDM.2002.1175814","DOIUrl":"https://doi.org/10.1109/IEDM.2002.1175814","url":null,"abstract":"A self-assembly conductive method for DNA identification has been demonstrated to be used in an array based microelectronic biochip. The detailed fabrication steps of the device and the procedures to identify targeted samples with gold nanoparticle labels are presented. By using the pre-hybridization and amplification method, the sensitivity of this array-based microelectronic biochip exceeds that of a traditional fluorescence detection system by three orders of magnitude. The device is simple and compatible with standard IC fabrication technology with slight modification to the last passivation and metallization process. A substantial difference in current is measured from the device with matched and unmatched DNA samples, which can be easily detected by any modern IC comparator.","PeriodicalId":74909,"journal":{"name":"Technical digest. International Electron Devices Meeting","volume":"31 1","pages":"207-210"},"PeriodicalIF":0.0,"publicationDate":"2002-12-08","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"86977701","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 6
Compact modeling of drain and gate current noise for RF CMOS 射频CMOS漏极和栅极电流噪声的紧凑建模
Technical digest. International Electron Devices Meeting Pub Date : 2002-12-08 DOI: 10.1109/IEDM.2002.1175795
A. Scholten, L. Tiemeijer, R. Van Langevelde, R. Havens, V. Venezia, A. Zegers-van Duijnhoven, B. Neinhus, C. Jungemann, D.B.M. Klaasen
{"title":"Compact modeling of drain and gate current noise for RF CMOS","authors":"A. Scholten, L. Tiemeijer, R. Van Langevelde, R. Havens, V. Venezia, A. Zegers-van Duijnhoven, B. Neinhus, C. Jungemann, D.B.M. Klaasen","doi":"10.1109/IEDM.2002.1175795","DOIUrl":"https://doi.org/10.1109/IEDM.2002.1175795","url":null,"abstract":"A model for RF CMOS circuit design is presented that is capable of predicting drain and gate current noise without adjusting any parameters. Additionally, the presence of (i) noise associated with avalanche multiplication, and (ii) shot noise of the direct-tunneling gate current in leaky dielectrics is revealed.","PeriodicalId":74909,"journal":{"name":"Technical digest. International Electron Devices Meeting","volume":"44 1","pages":"129-132"},"PeriodicalIF":0.0,"publicationDate":"2002-12-08","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"85978985","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 30
Chip technologies for Entertainment Robots - present and future 娱乐机器人的芯片技术——现在和未来
Technical digest. International Electron Devices Meeting Pub Date : 2002-12-08 DOI: 10.1109/IEDM.2002.1175768
T. Makimoto, T. Doi
{"title":"Chip technologies for Entertainment Robots - present and future","authors":"T. Makimoto, T. Doi","doi":"10.1109/IEDM.2002.1175768","DOIUrl":"https://doi.org/10.1109/IEDM.2002.1175768","url":null,"abstract":"The historical background, current status and future prospect of Entertainment Robots will be reviewed, and the critical roles played by chip technologies - including processor performance, sensing capability and actuator elements - discussed. Entertainment Robots were developed and introduced to the market in the late 1990s. Sony's AIBO, a dog-like Entertainment Robot, was the first of this kind and was sold through Internet channels beginning in 1999. Biped humanoid robots have also been developed and will be introduced to the market in the not too distant future. Examples of the latest developments in this field will be demonstrated, including Sony's SDR-4X, which was developed in 2002. Entertainment Robots will continue providing never-ending challenges for chip engineers and will become a new \"technology driver\" in the coming decades.","PeriodicalId":74909,"journal":{"name":"Technical digest. International Electron Devices Meeting","volume":"87 1","pages":"9-16"},"PeriodicalIF":0.0,"publicationDate":"2002-12-08","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"91168868","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 24
An organic optical bistable switch 一种有机光双稳开关
Technical digest. International Electron Devices Meeting Pub Date : 2002-12-08 DOI: 10.1109/IEDM.2002.1175985
J. Xue, S. Forrest
{"title":"An organic optical bistable switch","authors":"J. Xue, S. Forrest","doi":"10.1109/IEDM.2002.1175985","DOIUrl":"https://doi.org/10.1109/IEDM.2002.1175985","url":null,"abstract":"We demonstrate an organic optical bistable switch by integrating an organic photodetector on top of a transparent electrophosphorescent organic light-emitting diode. Optical bistability is achieved with an external field-effect transistor providing positive feedback. This integrated device has potential applications for automatic brightness control, image-retaining displays, and other photonic logic circuits.","PeriodicalId":74909,"journal":{"name":"Technical digest. International Electron Devices Meeting","volume":"65 1","pages":"913-915"},"PeriodicalIF":0.0,"publicationDate":"2002-12-08","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"81320365","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 5
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