B. Goebel, J. Lutzen, D. Manger, P. Moll, K. Mummler, M. Popp, U. Scheler, T. Schlosser, H. Seidl, M. Sesterhenn, S. Slesazeck, S. Tegen
{"title":"用于70纳米及以上DRAM的完全耗尽的周围栅极晶体管(SGT)","authors":"B. Goebel, J. Lutzen, D. Manger, P. Moll, K. Mummler, M. Popp, U. Scheler, T. Schlosser, H. Seidl, M. Sesterhenn, S. Slesazeck, S. Tegen","doi":"10.1109/IEDM.2002.1175831","DOIUrl":null,"url":null,"abstract":"A high performance surrounding gate transistor (SGT) enabling sufficient static and dynamic retention time of future DRAM cells is presented. For the first time, we demonstrate a fully depleted SGT, that shows no reduction of the retention time due to the transient bipolar effect. This effect potentially prevents DRAM application of fully depleted SGTs and is therefore investigated in detail. Based on experimental results, the impact of the proposed SGT on the scalability and performance of future DRAMs is discussed.","PeriodicalId":74909,"journal":{"name":"Technical digest. International Electron Devices Meeting","volume":"6 1","pages":"275-278"},"PeriodicalIF":0.0000,"publicationDate":"2002-12-08","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"16","resultStr":"{\"title\":\"Fully depleted surrounding gate transistor (SGT) for 70 nm DRAM and beyond\",\"authors\":\"B. Goebel, J. Lutzen, D. Manger, P. Moll, K. Mummler, M. Popp, U. Scheler, T. Schlosser, H. Seidl, M. Sesterhenn, S. Slesazeck, S. Tegen\",\"doi\":\"10.1109/IEDM.2002.1175831\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"A high performance surrounding gate transistor (SGT) enabling sufficient static and dynamic retention time of future DRAM cells is presented. For the first time, we demonstrate a fully depleted SGT, that shows no reduction of the retention time due to the transient bipolar effect. This effect potentially prevents DRAM application of fully depleted SGTs and is therefore investigated in detail. Based on experimental results, the impact of the proposed SGT on the scalability and performance of future DRAMs is discussed.\",\"PeriodicalId\":74909,\"journal\":{\"name\":\"Technical digest. International Electron Devices Meeting\",\"volume\":\"6 1\",\"pages\":\"275-278\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2002-12-08\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"16\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"Technical digest. International Electron Devices Meeting\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/IEDM.2002.1175831\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"Technical digest. International Electron Devices Meeting","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/IEDM.2002.1175831","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Fully depleted surrounding gate transistor (SGT) for 70 nm DRAM and beyond
A high performance surrounding gate transistor (SGT) enabling sufficient static and dynamic retention time of future DRAM cells is presented. For the first time, we demonstrate a fully depleted SGT, that shows no reduction of the retention time due to the transient bipolar effect. This effect potentially prevents DRAM application of fully depleted SGTs and is therefore investigated in detail. Based on experimental results, the impact of the proposed SGT on the scalability and performance of future DRAMs is discussed.
求助内容：
应助结果提醒方式：
京公网安备 11010802042870号
