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2021 IEEE International Interconnect Technology Conference (IITC)最新文献

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Advanced interconnect challenges beyond 5nm and possible solutions 超越5nm的先进互连挑战和可能的解决方案
2021 IEEE International Interconnect Technology Conference (IITC) Pub Date : 2021-07-06 DOI: 10.1109/IITC51362.2021.9537552
K. Park, H. Simka
{"title":"Advanced interconnect challenges beyond 5nm and possible solutions","authors":"K. Park, H. Simka","doi":"10.1109/IITC51362.2021.9537552","DOIUrl":"https://doi.org/10.1109/IITC51362.2021.9537552","url":null,"abstract":"As the on-chip interconnect scales down to below 30nm pitch, it faces challenges in all aspects of performance, yield, and cost. Performance degradation caused by electron scattering in narrow Cu damascene lines, combined with slow barrier/liner scaling is a big concern. In order to reduce the resistivity of damascene Cu lines, grain size and interface engineering are being investigated, as well as a new liner that can enable more aggressive thickness scaling. To improve capacitance, k-value reduction of dielectric films by damage recovery during process integration is being studied. Yield loss is mainly attributed to micro bridge, also known as stochastic printing failures of EUV lithography, or scaling induced Cu void or bridge defects. New photoresists or etch process recipes are being explored in order to address the micro bridge. Cu-fill friendly damascene profile is being introduced to suppress Cu void defects. Since rising BEOL cost is a critical challenge, single EUV patterning to replace double patterning is being actively investigated. In parallel to the conventional scaling, disruptive interconnect architectural changes such as backside power distribution network, and innovative materials such as alternative conductors, and 2D barriers / liners need to be considered.","PeriodicalId":6823,"journal":{"name":"2021 IEEE International Interconnect Technology Conference (IITC)","volume":"23 1","pages":"1-3"},"PeriodicalIF":0.0,"publicationDate":"2021-07-06","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"88186920","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
Advanced Air Gap Formation Scheme Using Volatile Material 利用挥发性材料的先进气隙形成方案
2021 IEEE International Interconnect Technology Conference (IITC) Pub Date : 2021-07-06 DOI: 10.1109/IITC51362.2021.9537549
H. Warashina, H. Kawasaki, H. Nagai, T. Yamaguchi, N. Sato, Y. Kikuchi, X. Sun
{"title":"Advanced Air Gap Formation Scheme Using Volatile Material","authors":"H. Warashina, H. Kawasaki, H. Nagai, T. Yamaguchi, N. Sato, Y. Kikuchi, X. Sun","doi":"10.1109/IITC51362.2021.9537549","DOIUrl":"https://doi.org/10.1109/IITC51362.2021.9537549","url":null,"abstract":"As a solution for RC delay of BEOL interconnect, we developed a novel air gap formation scheme. This scheme uses a volatile material (VM) and allows us to omit one lithography step, which was required for conventional air gap formation. It is possible to apply this scheme to subtractive interconnect scheme too. In this study, we will introduce the basic characteristics of VM and demonstrate the novel air gap integration through e-tests.","PeriodicalId":6823,"journal":{"name":"2021 IEEE International Interconnect Technology Conference (IITC)","volume":"1 1","pages":"1-3"},"PeriodicalIF":0.0,"publicationDate":"2021-07-06","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"90915578","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 5
Effects of composition deviation of CuAl2 on BTS and TDDB reliability CuAl2成分偏差对BTS和TDDB可靠性的影响
2021 IEEE International Interconnect Technology Conference (IITC) Pub Date : 2021-07-06 DOI: 10.1109/IITC51362.2021.9537528
T. Kuge, M. Yahagi, J. Koike
{"title":"Effects of composition deviation of CuAl2 on BTS and TDDB reliability","authors":"T. Kuge, M. Yahagi, J. Koike","doi":"10.1109/IITC51362.2021.9537528","DOIUrl":"https://doi.org/10.1109/IITC51362.2021.9537528","url":null,"abstract":"In this paper, we report the property and reliability of CuAl2 and its effects of compositional shift within ±5%. Resistivity was found to be 7–8 μΩ· cm after annealing at 400 °C, even with compositional shift. Capacitance–Voltage (C–V) after Bias Thermal Stress (BTS) test showed no shift of flat–band voltage under the condition of 3.0 MV/cm × 30 min at 250 °C. Time–Dependent–Dielectric–Breakdown (TDDB) evaluation showed that the reliability is better than that of conventional Cu/TaN interconnects.","PeriodicalId":6823,"journal":{"name":"2021 IEEE International Interconnect Technology Conference (IITC)","volume":"24 1","pages":"1-3"},"PeriodicalIF":0.0,"publicationDate":"2021-07-06","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"82689750","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
Two-level MOL and VHV routing style to enable extreme height scaling beyond 2nm technology node 两级MOL和VHV路由方式，可实现超过2nm技术节点的极端高度缩放
2021 IEEE International Interconnect Technology Conference (IITC) Pub Date : 2021-07-06 DOI: 10.1109/IITC51362.2021.9537557
B. Chehab, O. Zografos, E. Litta, Z. Ahmed, P. Schuddinck, D. Jang, G. Hellings, A. Spessot, P. Weckx, J. Ryckaert
{"title":"Two-level MOL and VHV routing style to enable extreme height scaling beyond 2nm technology node","authors":"B. Chehab, O. Zografos, E. Litta, Z. Ahmed, P. Schuddinck, D. Jang, G. Hellings, A. Spessot, P. Weckx, J. Ryckaert","doi":"10.1109/IITC51362.2021.9537557","DOIUrl":"https://doi.org/10.1109/IITC51362.2021.9537557","url":null,"abstract":"Due to the slowdown in gate pitch scaling linked to fundamental physical limitations, standard cell (SDC) height reduction becomes a key to achieve the scaling targets. In this work, a two-level (2L) middle of line (MOL) scheme based on a forksheet (FSH) device architecture and Vertical-Horizontal-Vertical (VHV) routing style is proposed to achieve 4-Track (4T) SDC template. The proposed architecture achieves 21% higher Power-Performance-Area (PPA) compared to the traditional 5T-HVH FSH architecture with limited additional process complexity and Cost (C).","PeriodicalId":6823,"journal":{"name":"2021 IEEE International Interconnect Technology Conference (IITC)","volume":"19 1","pages":"1-3"},"PeriodicalIF":0.0,"publicationDate":"2021-07-06","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"84439269","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 5
A Thin Adhesive for 3D/2.5D Si Chip Stacking at Low Temperature 一种用于3D/2.5D硅片低温堆叠的薄胶粘剂
2021 IEEE International Interconnect Technology Conference (IITC) Pub Date : 2021-07-06 DOI: 10.1109/IITC51362.2021.9537390
Y. Kayaba, Yuzo Nakamura, T. Kozeki, J. Kamada, K. Kohmura
{"title":"A Thin Adhesive for 3D/2.5D Si Chip Stacking at Low Temperature","authors":"Y. Kayaba, Yuzo Nakamura, T. Kozeki, J. Kamada, K. Kohmura","doi":"10.1109/IITC51362.2021.9537390","DOIUrl":"https://doi.org/10.1109/IITC51362.2021.9537390","url":null,"abstract":"The bonding property of a thin adhesive for the high density 3D/2.5D Si chip integration with the Cu-Cu bonding at the low temperature range (150–400 °C) was investigated. The cured thin adhesive is bondable to SiO2 after baking at 150 °C with the high surface energy (6.4 J/m2). By using this adhesive Si chip can be integrated in 3D/2.5D with no thermal sliding and no adhesive protrusion from the chip corner. The reliability test results are also investigated.","PeriodicalId":6823,"journal":{"name":"2021 IEEE International Interconnect Technology Conference (IITC)","volume":"42 1","pages":"1-3"},"PeriodicalIF":0.0,"publicationDate":"2021-07-06","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"83668742","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 2
An Investigation for Electromagnetic and Electrothermal coupling Characteristics of Hybrid Bond in Stacked Embedded DRAM with MRPIM 基于MRPIM的堆叠嵌入式DRAM混合键电磁与电热耦合特性研究
2021 IEEE International Interconnect Technology Conference (IITC) Pub Date : 2021-07-06 DOI: 10.1109/IITC51362.2021.9537362
Jingrui Chai, Xiping Jiang, Xudong Gao, Bing Yu, Xiaofeng Zhou, Pengcheng Yin, Song Wang, J. Tan, Zhengwen Wang, Mei Li, Gang Dong, Qiwei Ren
{"title":"An Investigation for Electromagnetic and Electrothermal coupling Characteristics of Hybrid Bond in Stacked Embedded DRAM with MRPIM","authors":"Jingrui Chai, Xiping Jiang, Xudong Gao, Bing Yu, Xiaofeng Zhou, Pengcheng Yin, Song Wang, J. Tan, Zhengwen Wang, Mei Li, Gang Dong, Qiwei Ren","doi":"10.1109/IITC51362.2021.9537362","DOIUrl":"https://doi.org/10.1109/IITC51362.2021.9537362","url":null,"abstract":"Wafer-to-wafer hybrid bonding technology is used to realize a DRAM array wafer and a logic wafer face-to-face connected with the advantages of a high density integration for high bandwidth and energy efficiency. With the proposed stacked embedded DRAM (SEDRAM), the electromagnetic crosstalk and the electrothermal performance of hybrid bonding via (HBV) are studied using the proposed Meshless radial point interpolation method (M-RPIM) to reduce the electromagnetic crosstalk and the thermal crosstalk of the array. A parallelogram layout which arranges the signal HBVs and the ground HBVs in parallelogram shows the crosstalk noise and the maximum temperature is reduced by 10% and 11% respectively. In addition, an advanced honeycomb arrangement with dummy HBVs array and the interleaving stacking TSV-HBV structure are also proposed to further improve the performance of the SEDRAM.","PeriodicalId":6823,"journal":{"name":"2021 IEEE International Interconnect Technology Conference (IITC)","volume":"352 1","pages":"1-3"},"PeriodicalIF":0.0,"publicationDate":"2021-07-06","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"76586698","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Aluminide intermetallics for advanced interconnect metallization: thin film studies 用于高级互连金属化的铝化物金属间化合物:薄膜研究
2021 IEEE International Interconnect Technology Conference (IITC) Pub Date : 2021-07-06 DOI: 10.1109/IITC51362.2021.9537441
J. Soulie, Z. Tokei, J. Swerts, C. Adelmann
{"title":"Aluminide intermetallics for advanced interconnect metallization: thin film studies","authors":"J. Soulie, Z. Tokei, J. Swerts, C. Adelmann","doi":"10.1109/IITC51362.2021.9537441","DOIUrl":"https://doi.org/10.1109/IITC51362.2021.9537441","url":null,"abstract":"AlNi, Al3Sc, AlCu, and Al2Cu thin films have been investigated as potential alternatives for Cu in interconnect metallization schemes. Stoichiometric NiAl thin films of 56 nm thickness show a resistivity of 13.9 μΩ cm after post-deposition annealing at 600°C. Different capping layers were tested to overcome the formation of an oxide top layer. Al3Sc presents a resistivity of 12.5 μΩ cm after post-deposition annealing at 500°C (for 24 nm thick films). AlCu and Al2Cu outperform Ru films at 20 nm thickness and above (9.5 μΩ cm for 28 nm films). Challenges and integration feasibility are discussed.","PeriodicalId":6823,"journal":{"name":"2021 IEEE International Interconnect Technology Conference (IITC)","volume":"36 1","pages":"1-3"},"PeriodicalIF":0.0,"publicationDate":"2021-07-06","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"78051950","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 9
Controlled ALE-type recess of molybdenum for future logic and memory applications 用于未来逻辑和存储器应用的可控ale型钼凹槽
2021 IEEE International Interconnect Technology Conference (IITC) Pub Date : 2021-07-06 DOI: 10.1109/IITC51362.2021.9537407
A. Pacco, Teppei Nakano, A. Iwasaki, Shota Iwahata, E. Sanchez
{"title":"Controlled ALE-type recess of molybdenum for future logic and memory applications","authors":"A. Pacco, Teppei Nakano, A. Iwasaki, Shota Iwahata, E. Sanchez","doi":"10.1109/IITC51362.2021.9537407","DOIUrl":"https://doi.org/10.1109/IITC51362.2021.9537407","url":null,"abstract":"Molybdenum (Mo) is a promising metal for applications requiring low resistivity interconnects or contact lines in small dimensions. Etching of polycrystalline metals like Mo with conventional etching methods can be challenging because of the increased surface roughness and non-uniform recess. In this paper we describe a novel sequential etching method comprising two steps. The first step is an oxidation step in ozone (O3) at elevated temperatures in the range of 180°C–290°C resulting in a smooth metal/oxide interface. The second step is a selective oxide dissolution. The benefits of this cyclic, ALE-type recess over continuous wet-etching processes are improved etch-rate control and reduced surface roughness. Finally, we also demonstrated lateral recess of Mo word lines in 3D-NAND like structures resulting in uniformly recessed, straight-walled word lines.","PeriodicalId":6823,"journal":{"name":"2021 IEEE International Interconnect Technology Conference (IITC)","volume":"1 1","pages":"1-3"},"PeriodicalIF":0.0,"publicationDate":"2021-07-06","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"73489368","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 2
IITC 2021 Abstract and Keywords IITC 2021摘要与关键词
2021 IEEE International Interconnect Technology Conference (IITC) Pub Date : 2021-07-06 DOI: 10.1109/iitc51362.2021.9537511
{"title":"IITC 2021 Abstract and Keywords","authors":"","doi":"10.1109/iitc51362.2021.9537511","DOIUrl":"https://doi.org/10.1109/iitc51362.2021.9537511","url":null,"abstract":"","PeriodicalId":6823,"journal":{"name":"2021 IEEE International Interconnect Technology Conference (IITC)","volume":"8 1","pages":""},"PeriodicalIF":0.0,"publicationDate":"2021-07-06","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"76166506","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
An alternative to Tungsten in 3D-NAND technology 3D-NAND技术中钨的替代品
2021 IEEE International Interconnect Technology Conference (IITC) Pub Date : 2021-07-06 DOI: 10.1109/IITC51362.2021.9537409
Suhr Dominique, Mevellec Vincent, Thiam Mikailou, Idier Jonathan, Raynal Frédéric, Berthon Hermine, Perrault Elisa, Hann Nicolas, Doussot Céline, Kim Yeeseul, Baus Mathilde, Lakhdari Amine, Guittet Gaëlle, Caillard Louis
{"title":"An alternative to Tungsten in 3D-NAND technology","authors":"Suhr Dominique, Mevellec Vincent, Thiam Mikailou, Idier Jonathan, Raynal Frédéric, Berthon Hermine, Perrault Elisa, Hann Nicolas, Doussot Céline, Kim Yeeseul, Baus Mathilde, Lakhdari Amine, Guittet Gaëlle, Caillard Louis","doi":"10.1109/IITC51362.2021.9537409","DOIUrl":"https://doi.org/10.1109/IITC51362.2021.9537409","url":null,"abstract":"As the number of wordlines has reached 128 layers in the realm of 3D-NAND, several challenges have emerged to produce these structures. Among these is metallization of the connection made with Tungsten. This paper explores Nickel alloys as an alternative metal. Several key data are presented to validate this new concept.","PeriodicalId":6823,"journal":{"name":"2021 IEEE International Interconnect Technology Conference (IITC)","volume":"11 1","pages":"1-3"},"PeriodicalIF":0.0,"publicationDate":"2021-07-06","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"81671876","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
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