Microelectronics Journal最新文献_第7页

Single-step electron beam evaporation for integrated dual-metal gate and gate field-plate in GaN-on-Si MIS-HEMTs GaN-on-Si miss - hemt集成双金属栅极和栅极场板的单步电子束蒸发

IF 1.9 3区工程技术

Microelectronics Journal Pub Date : 2025-03-26 DOI: 10.1016/j.mejo.2025.106663

Sheng Gao , Yanjun Wu , Xingyu Luo , Shengqi Yu , Qi Wang

{"title":"Single-step electron beam evaporation for integrated dual-metal gate and gate field-plate in GaN-on-Si MIS-HEMTs","authors":"Sheng Gao , Yanjun Wu , Xingyu Luo , Shengqi Yu , Qi Wang","doi":"10.1016/j.mejo.2025.106663","DOIUrl":"10.1016/j.mejo.2025.106663","url":null,"abstract":"<div><div>This work reports the demonstration high performance GaN-on-Si metal-insulator-semiconductor (MIS) high-electron-mobility transistors (HEMTs) featuring dual-metal gate (DMG) and gate field-plate (GFP) structures. The DMG-GFP structures can be realized in a single step by adjusting the angle of electron beam evaporation, eliminating the requirement for multiple process steps. Higher carrier transfer efficiency and more uniform electric field distribution of the DMG-GFP-HEMTs (gate to drain distance <em>L</em><sub>GD</sub> of 18 μm) result in a pronounced enhancement of drain current (<em>I</em><sub>D</sub>) and transconductance (<em>G</em><sub>m</sub>) by 15 %, a remarkable breakdown voltage (<em>V</em><sub>br</sub>) increases of 44.9 %, and a significantly reduced current collapse over the single metal gate (SMG) control devices. Besides, the <em>V</em><sub>br</sub> of DMG-GFP-HEMTs exhibits a noteworthy 16.8 % improvement compared to SMG-GFP-HEMTs, further validating the advantageous impact of the DMG structure on <em>V</em><sub>br</sub> performance. Weibull analysis at 25 °C extrapolated a 10-year maximum operating gate voltage of 6.4 V for DMG-GFP HEMTs, a 16.3 % improvement over SMG-GFP HEMTs. The mechanism of DMG-GFP structures for suppressing current collapse has also been investigated, where the DMG structure helps to weaken the electron capture effect on the AlGaN/SiNx interface and the GFP structure enables the timely release of trapped electrons.</div></div>","PeriodicalId":49818,"journal":{"name":"Microelectronics Journal","volume":"159 ","pages":"Article 106663"},"PeriodicalIF":1.9,"publicationDate":"2025-03-26","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"143726100","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":3,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 0

Impact of the collector structure on the performance of the insulated gate bipolar transistor 集电极结构对绝缘栅双极晶体管性能的影响

IF 1.9 3区工程技术

Microelectronics Journal Pub Date : 2025-03-25 DOI: 10.1016/j.mejo.2025.106651

Jeroen van Zoeren , Gaurav Gupta , Boni Boksteen , Lis K. Nanver , Raymond J.E. Hueting

引用次数: 0

An 8-bit 1.16 mw 500 ms/s SAR ADC with bidirectional-bit-distribution-based offset calibration and partially activated accelerating current source 一个8位的1.16 mw 500 ms/s SAR ADC，基于双向位分布的偏移校准和部分激活的加速电流源

IF 1.9 3区工程技术

Microelectronics Journal Pub Date : 2025-03-24 DOI: 10.1016/j.mejo.2025.106649

Min Lin, Pengjun He, Jinpeng Tian

引用次数: 0

A 500 MS/s 12b single channel SAR-assisted pipelined ADC with two-stage open-loop dynamic amplifier 一个500 MS/s的12b单通道sar辅助流水线ADC，带两级开环动态放大器

IF 1.9 3区工程技术

Microelectronics Journal Pub Date : 2025-03-22 DOI: 10.1016/j.mejo.2025.106659

Qing Su , Xuan Guo , Hanbo Jia , Heping Ma , Linzhen Wu , Kai Sun , Xinyu Liu

引用次数: 0

A digital background calibration method for SAR ADC based on dual-layer feedforward neural network 基于双层前馈神经网络的SAR ADC数字背景标定方法

IF 1.9 3区工程技术

Microelectronics Journal Pub Date : 2025-03-22 DOI: 10.1016/j.mejo.2025.106645

Tiehu Li , Jintao Huang , Jun Zeng , Chaodong Guo , Wei Zhang , Xiaojun Fu , Daiguo Xu , Gang Yan , Junyi Jiang , Rui Lai , Jun-an Zhang

{"title":"A digital background calibration method for SAR ADC based on dual-layer feedforward neural network","authors":"Tiehu Li , Jintao Huang , Jun Zeng , Chaodong Guo , Wei Zhang , Xiaojun Fu , Daiguo Xu , Gang Yan , Junyi Jiang , Rui Lai , Jun-an Zhang","doi":"10.1016/j.mejo.2025.106645","DOIUrl":"10.1016/j.mejo.2025.106645","url":null,"abstract":"<div><div>This paper addresses the impact of capacitor mismatch, comparator offset, and incomplete settling of the digital-to-analog converter (DAC) on the dynamic performance of Successive Approximation Register (SAR) Analog-to-Digital Converters (ADCs). A digital background calibration method using a double-layer feedforward neural network is proposed. The network is trained in MATLAB and implemented on an FPGA to validate the calibration algorithm. The study explores the influence of parameters like the number of neurons, training samples, and iterations on performance. FPGA results show that, after calibration, the Spurious-Free Dynamic Range (SFDR) and Signal-to-Noise-and-Distortion Ratio (SNDR) of a 12-bit 100 MSPS SAR ADC model improved from 46.58 dB and 46.53 dB to 98.10 dB and 70.87 dB. Similarly, for a 10-bit 31.25 MSPS SAR ADC chip, SFDR and SNDR increased from 61.46 dB and 46.86 dB to 79.87 dB and 57.09 dB. These results confirm the proposed method’s effectiveness for addressing non-idealities in both simulated models and hardware.</div></div>","PeriodicalId":49818,"journal":{"name":"Microelectronics Journal","volume":"159 ","pages":"Article 106645"},"PeriodicalIF":1.9,"publicationDate":"2025-03-22","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"143705554","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":3,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 0

A dual-channel half-rate 32 Gb/s, 5.3 pJ/bit SerDes transceiver with 3-tap-FFE and CTLE in 28-nm CMOS for very short reach C2C and C2M interconnection 双通道半速率32gb /s， 5.3 pJ/bit SerDes收发器，具有3分接ffe和CTLE，采用28纳米CMOS，可实现极短距离C2C和C2M互连

IF 1.9 3区工程技术

Microelectronics Journal Pub Date : 2025-03-21 DOI: 10.1016/j.mejo.2025.106641

Zhaoyang Liu , Zhanhao Wen , Bao Chen , Jiang Xu , Zedong Wang , Xuqiang Zheng

{"title":"A dual-channel half-rate 32 Gb/s, 5.3 pJ/bit SerDes transceiver with 3-tap-FFE and CTLE in 28-nm CMOS for very short reach C2C and C2M interconnection","authors":"Zhaoyang Liu , Zhanhao Wen , Bao Chen , Jiang Xu , Zedong Wang , Xuqiang Zheng","doi":"10.1016/j.mejo.2025.106641","DOIUrl":"10.1016/j.mejo.2025.106641","url":null,"abstract":"<div><div>This paper proposes a dual-channel very short reach (VSR) SerDes transceiver designed for chip-to-chip (C2C) or chip-to-module (C2M) interconnections. The transmitter utilizes a half-rate architecture and is composed of high-speed multiplexers (MUXs), a clock distribution module, and an adjustable 3-tap feed-forward equalizer (FFE). The proposed receiver employs a half-rate oversampling architecture, consisting of a continuous time linear equalizer (CTLE), a CML-based static comparator, high-speed demultiplexers (DEMUXs), a multiphase clock generation module based on an active polyphase filter (APFF), a phase interpolator (PI), and a clock and data recovery (CDR) loop. This dual-channel transceiver is designed with a 28-nm CMOS process technology and supplied with 1/1.2 V. Post-simulation results show that this transceiver can operate at a data rate of 32 Gb/s with a power efficiency of 1.81 pJ/bit for transmitter and 3.5 pJ/bit for receiver. The transceiver’s BER is less than 1E-12 and eye-wide-opening is 0.86 UI, which is under 12.4 dB channel loss at 16 GHz Nyquist frequency.</div></div>","PeriodicalId":49818,"journal":{"name":"Microelectronics Journal","volume":"159 ","pages":"Article 106641"},"PeriodicalIF":1.9,"publicationDate":"2025-03-21","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"143686133","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":3,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 0

Design of a dual-band filter based on mode composite structure combining substrate integrated waveguides and slotlines 基于基片集成波导与槽线相结合的模式复合结构双带滤波器的设计

IF 1.9 3区工程技术

Microelectronics Journal Pub Date : 2025-03-19 DOI: 10.1016/j.mejo.2025.106650

Yuhao Yang , Yongle Wu , Weimin Wang , Shiyu Xie , Yuanan Liu

引用次数: 0

A 107.5-dB dynamic range 402-μW event-driven dynamic zoom ADC with voice activity detection function for audio applications 107.5 db动态范围402 μ w事件驱动动态变焦ADC，具有语音活动检测功能，适用于音频应用

IF 1.9 3区工程技术

Microelectronics Journal Pub Date : 2025-03-19 DOI: 10.1016/j.mejo.2025.106654

Zhiming Li , Lei Dong , Quan Sun , Yang Chen , Yuming Li , Jie Zhang , Huanhuan Qi , Xiaofei Wang , Hong Zhang

{"title":"A 107.5-dB dynamic range 402-μW event-driven dynamic zoom ADC with voice activity detection function for audio applications","authors":"Zhiming Li , Lei Dong , Quan Sun , Yang Chen , Yuming Li , Jie Zhang , Huanhuan Qi , Xiaofei Wang , Hong Zhang","doi":"10.1016/j.mejo.2025.106654","DOIUrl":"10.1016/j.mejo.2025.106654","url":null,"abstract":"<div><div>This paper presents a dynamic zoom analog-to-digital converter (ADC) for audio applications, which combines a 5-bit coarse event-driven (ED) ADC (also called level-crossing ADC) and a 3rd-order, single-bit discrete-time ΔΣ modulator (ΔΣM). With 2 low-power continuous-time (CT) comparators and a corresponding digital circuit operating only at the event that the input signal crosses the reference levels, the coarse ED ADC consumes much less power than those coarse SAR ADCs operating under the sampling frequency (Fs) in the conventional dynamic zoom ADC schemes, because the ED scheme operates with much less activity and shows higher adaptivity to real acoustic signal applications. Moreover, the ED ADC output can be utilized to generate a voice activity detection (VAD) signal, which provides a simple on-device audio computing function for the analog front-ends in audio applications. A cascoded floating-inverter-amplifier (FIA) based integrator is employed in the fine ΔΣM to reduce power consumption further. Fabricated in a 0.18-μm CMOS process, the prototype ADC chip achieves 102.1-dB peak signal-to-noise ratio (SNR), 103.1-dB peak signal-to-noise-and-distortion ratio (SNDR), and 107.5-dB dynamic range (DR) for a 24-kHz bandwidth and 6.144-MHz Fs, while consuming only 402 μW under the 1.8-V power supply, resulting in a Schreier Figure-of-Merit (FoMs) of 185.3 dB.</div></div>","PeriodicalId":49818,"journal":{"name":"Microelectronics Journal","volume":"159 ","pages":"Article 106654"},"PeriodicalIF":1.9,"publicationDate":"2025-03-19","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"143685621","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":3,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 0

Compact HRS IPD N77 bandpass filter based on tapered spiral inductors and innovative source-load coupling 紧凑型HRS IPD N77带通滤波器基于锥形螺旋电感和创新的源负载耦合

IF 1.9 3区工程技术

Microelectronics Journal Pub Date : 2025-03-19 DOI: 10.1016/j.mejo.2025.106653

Yuhan Cao, Bukun Xu, Bo Yuan, Gaofeng Wang

引用次数: 0

A PVT-Insensitive instrumentation amplifier with 17.95 mHz high-pass corner based on a PSSP hybrid feedback resistor 基于PSSP混合反馈电阻的17.95 mHz高通角pvt不敏感仪表放大器

IF 1.9 3区工程技术

Microelectronics Journal Pub Date : 2025-03-18 DOI: 10.1016/j.mejo.2025.106640

Hao Xu, Shilong Chen, Lu Liu, Guangyin Shi, Tianke Li, Zhiqiang Li, Jun Zhang, Haiying Zhang

{"title":"A PVT-Insensitive instrumentation amplifier with 17.95 mHz high-pass corner based on a PSSP hybrid feedback resistor","authors":"Hao Xu, Shilong Chen, Lu Liu, Guangyin Shi, Tianke Li, Zhiqiang Li, Jun Zhang, Haiying Zhang","doi":"10.1016/j.mejo.2025.106640","DOIUrl":"10.1016/j.mejo.2025.106640","url":null,"abstract":"<div><div>This work presents a capacitively coupled instrumentation amplifier (IA) for applications in the field of physiological signals, and the proposed hybrid resistor realizes its feedback resistance. It allows the capacitively coupled IA to achieve Tera-ohm (T<span><math><mi>Ω</mi></math></span>) feedback resistance and be robust to process, voltage, and temperature (PVT) variations. This hybrid feedback resistor and feedback capacitor of the capacitively coupled IA form a low-pass filter to filter out undesired spike signals. The capacitively coupled IA was implemented in a 130 nm standard CMOS process. The simulation results show that the proposed capacitively coupled IA can realize a high-pass corner of 17.95 mHz and a gain of 36.69 dB. The difference between the maximum and minimum values of the high-pass corner of the capacitively coupled IA under different PVT conditions is only 0.014 Hz. The maximum value of the absolute value of its high-pass corner change rate is 0.30. The proposed capacitively coupled IA can realize a 72.6 dB signal-to-noise and distortion ratio (SNDR).</div></div>","PeriodicalId":49818,"journal":{"name":"Microelectronics Journal","volume":"159 ","pages":"Article 106640"},"PeriodicalIF":1.9,"publicationDate":"2025-03-18","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"143686092","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":3,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 0