A gate-aware GRU model with trend-residual decomposition and quantile regression for remaining useful life prediction of IGBT

IF 1.9 3区 工程技术 Q3 ENGINEERING, ELECTRICAL & ELECTRONIC
Weibo Wang , Xinyu Wen , Mingze Zhang , Yiming Wang , Yongkang Zheng , Mingmao Gong , Dong Liu
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引用次数: 0

Abstract

In predicting the remaining useful life (RUL) of IGBT, the time series data (e.g., emitter-collector on-state voltage drop) characterizing the aging state of IGBT have the nonlinear characteristics of “slow change in the early stage and rapid degradation in the later stage”, and are accompanied by long-term trends and short-term disturbances, which bring challenges to the stability and prediction accuracy of traditional modeling methods. In addition, the existing RUL prediction models mostly focus on point prediction or parameter interval prediction based on distribution assumptions, which is difficult to meet the demand for quantification of prediction uncertainty and risk assessment in engineering applications. To this end, this paper proposes an improved gated recurrent network model (QT-GAGRU) based on trend-residual decomposition and quantile regression for realizing point-interval prediction of IGBT RUL. First, the trend and residual decomposition of the time series are performed and modeled separately using the sliding average method to alleviate the impact of data non-stationarity on the prediction performance; second, the input difference-based gate-aware mechanism (GAGRU) is introduced into the gated recurrent unit to enhance the model's ability of modeling the mutation features in the nonlinear degradation process; and then, for the first time, this paper incorporates the nonparametric interval prediction method -quartile regression (QR) is introduced into the IGBT RUL prediction model to achieve the quantification of model uncertainty without relying on distributional assumptions. Finally, the experimental results on self IGBT aging dataset and NASA public dataset show that the accuracy of the model is better than the existing IGBT RUL prediction models in terms of point prediction, and the interval prediction coverage is high and the interval width is small, which verifies the validity and engineering utility value of the QT-GAGRU model.
基于趋势残差分解和分位数回归的栅极感知GRU模型用于IGBT剩余使用寿命预测
在对IGBT剩余使用寿命(RUL)的预测中,表征IGBT老化状态的时间序列数据(如发射集电极导通压降)具有“前期缓慢变化、后期快速退化”的非线性特征,并伴有长期趋势和短期扰动,对传统建模方法的稳定性和预测精度提出了挑战。此外,现有的RUL预测模型多侧重于基于分布假设的点预测或参数区间预测,难以满足工程应用中预测不确定性量化和风险评估的需求。为此,本文提出了一种基于趋势残差分解和分位数回归的改进门控循环网络模型(QT-GAGRU),用于实现IGBT规则的点区间预测。首先,对时间序列进行趋势分解和残差分解,采用滑动平均方法分别建模,减轻数据非平稳性对预测性能的影响;其次,在门控循环单元中引入基于输入差分的门控感知机制(GAGRU),增强了模型对非线性退化过程中突变特征的建模能力;在此基础上,首次将非参数区间预测方法——四分位数回归(QR)引入到IGBT RUL预测模型中,实现了不依赖于分布假设的模型不确定性的量化。最后,在自IGBT老化数据集和NASA公共数据集上的实验结果表明,该模型在点预测方面的精度优于现有的IGBT RUL预测模型,且区间预测覆盖率高、区间宽度小,验证了QT-GAGRU模型的有效性和工程实用价值。
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来源期刊
Microelectronics Journal
Microelectronics Journal 工程技术-工程:电子与电气
CiteScore
4.00
自引率
27.30%
发文量
222
审稿时长
43 days
期刊介绍: Published since 1969, the Microelectronics Journal is an international forum for the dissemination of research and applications of microelectronic systems, circuits, and emerging technologies. Papers published in the Microelectronics Journal have undergone peer review to ensure originality, relevance, and timeliness. The journal thus provides a worldwide, regular, and comprehensive update on microelectronic circuits and systems. The Microelectronics Journal invites papers describing significant research and applications in all of the areas listed below. Comprehensive review/survey papers covering recent developments will also be considered. The Microelectronics Journal covers circuits and systems. This topic includes but is not limited to: Analog, digital, mixed, and RF circuits and related design methodologies; Logic, architectural, and system level synthesis; Testing, design for testability, built-in self-test; Area, power, and thermal analysis and design; Mixed-domain simulation and design; Embedded systems; Non-von Neumann computing and related technologies and circuits; Design and test of high complexity systems integration; SoC, NoC, SIP, and NIP design and test; 3-D integration design and analysis; Emerging device technologies and circuits, such as FinFETs, SETs, spintronics, SFQ, MTJ, etc. Application aspects such as signal and image processing including circuits for cryptography, sensors, and actuators including sensor networks, reliability and quality issues, and economic models are also welcome.
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