Bingqiang Liu , Zehua Yin , Ziang Duan , Jian Xiao , Yulong Tan , Jipeng Wang , Zixuan Shen , Zhigang Wu , Chao Wang
{"title":"A fully pipelined, low-overhead, and energy-efficient CNN-based feature extraction accelerator for mobile visual SLAM","authors":"Bingqiang Liu , Zehua Yin , Ziang Duan , Jian Xiao , Yulong Tan , Jipeng Wang , Zixuan Shen , Zhigang Wu , Chao Wang","doi":"10.1016/j.mejo.2025.106860","DOIUrl":null,"url":null,"abstract":"<div><div>Feature extraction is critical for Visual Simultaneous Localization And Mapping (VSLAM). The CNN-based SuperPoint outperforms traditional feature extractors but its high complexity hinders deployment on energy-constrained edge devices like small mobile robots. This paper proposes an energy-efficient SuperPoint hardware accelerator for VSLAM. The key contributions are: (1) developing a lightweight SuperPoint network by reducing filter numbers based on hierarchical feature characteristics, achieving an 88.3 % reduction in model size; (2) implementing a fully pipelined architecture to avoid general-purpose processing and deep learning IP, improving energy efficiency by eliminating off-chip access and sequential computation; (3) introducing a selective descriptor convolution strategy to skip redundant calculations on non-feature points, reducing descriptor computation and hardware overhead; and (4) proposing an optimized Non-Maximum Suppression strategy to remove duplicate comparisons within the sliding windows, further enhancing energy efficiency. FPGA evaluation shows 9.09 × lower hardware overhead and 58.2 mJ/frame energy efficiency, 22.2 % better than state-of-the-art, processing 480 × 640 images at 20 fps under 200 MHz.</div></div>","PeriodicalId":49818,"journal":{"name":"Microelectronics Journal","volume":"165 ","pages":"Article 106860"},"PeriodicalIF":1.9000,"publicationDate":"2025-08-25","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"Microelectronics Journal","FirstCategoryId":"5","ListUrlMain":"https://www.sciencedirect.com/science/article/pii/S1879239125003091","RegionNum":3,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"Q3","JCRName":"ENGINEERING, ELECTRICAL & ELECTRONIC","Score":null,"Total":0}
引用次数: 0
Abstract
Feature extraction is critical for Visual Simultaneous Localization And Mapping (VSLAM). The CNN-based SuperPoint outperforms traditional feature extractors but its high complexity hinders deployment on energy-constrained edge devices like small mobile robots. This paper proposes an energy-efficient SuperPoint hardware accelerator for VSLAM. The key contributions are: (1) developing a lightweight SuperPoint network by reducing filter numbers based on hierarchical feature characteristics, achieving an 88.3 % reduction in model size; (2) implementing a fully pipelined architecture to avoid general-purpose processing and deep learning IP, improving energy efficiency by eliminating off-chip access and sequential computation; (3) introducing a selective descriptor convolution strategy to skip redundant calculations on non-feature points, reducing descriptor computation and hardware overhead; and (4) proposing an optimized Non-Maximum Suppression strategy to remove duplicate comparisons within the sliding windows, further enhancing energy efficiency. FPGA evaluation shows 9.09 × lower hardware overhead and 58.2 mJ/frame energy efficiency, 22.2 % better than state-of-the-art, processing 480 × 640 images at 20 fps under 200 MHz.
期刊介绍:
Published since 1969, the Microelectronics Journal is an international forum for the dissemination of research and applications of microelectronic systems, circuits, and emerging technologies. Papers published in the Microelectronics Journal have undergone peer review to ensure originality, relevance, and timeliness. The journal thus provides a worldwide, regular, and comprehensive update on microelectronic circuits and systems.
The Microelectronics Journal invites papers describing significant research and applications in all of the areas listed below. Comprehensive review/survey papers covering recent developments will also be considered. The Microelectronics Journal covers circuits and systems. This topic includes but is not limited to: Analog, digital, mixed, and RF circuits and related design methodologies; Logic, architectural, and system level synthesis; Testing, design for testability, built-in self-test; Area, power, and thermal analysis and design; Mixed-domain simulation and design; Embedded systems; Non-von Neumann computing and related technologies and circuits; Design and test of high complexity systems integration; SoC, NoC, SIP, and NIP design and test; 3-D integration design and analysis; Emerging device technologies and circuits, such as FinFETs, SETs, spintronics, SFQ, MTJ, etc.
Application aspects such as signal and image processing including circuits for cryptography, sensors, and actuators including sensor networks, reliability and quality issues, and economic models are also welcome.