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2023 7th IEEE Electron Devices Technology & Manufacturing Conference (EDTM)最新文献

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Transverse Spurious Mode Free SAW Resonators and Delay Line on GaN/Si with High Quality Factor 高品质因数GaN/Si上无横向杂散模式SAW谐振器和延迟线
2023 7th IEEE Electron Devices Technology & Manufacturing Conference (EDTM) Pub Date : 2023-03-07 DOI: 10.1109/EDTM55494.2023.10102990
Guofang Yu, R. Liang, Haiming Zhao, Jun Fu, Tian-ling Ren
{"title":"Transverse Spurious Mode Free SAW Resonators and Delay Line on GaN/Si with High Quality Factor","authors":"Guofang Yu, R. Liang, Haiming Zhao, Jun Fu, Tian-ling Ren","doi":"10.1109/EDTM55494.2023.10102990","DOIUrl":"https://doi.org/10.1109/EDTM55494.2023.10102990","url":null,"abstract":"This work presents a dummy finger structure for eliminating the transverse spurious mode on the GaN/Si surface acoustic wave (SAW) resonators. The fabricated resonators have a high quality factor, and the transverse spurious mode is effectively suppressed. A maximum quality factor of 81 77 at a resonant frequency $(f_{r})$ of 1.9173 GHz is obtained. Moreover, it is shown that the transverse spurious mode is independent of the propagation directions. A delay line with the dummy finger shows a minimum insertion loss of 16.44 dB. These results could pave the way for future intelligent lab-on-chip sensor applications.","PeriodicalId":418413,"journal":{"name":"2023 7th IEEE Electron Devices Technology & Manufacturing Conference (EDTM)","volume":"23 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2023-03-07","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"127670735","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Enhancement in Bipolar Conductance Linearity by One Transistor - One Resistor (1T1R) cell with Non-Filamentary PCMO-RRAM as Synapse for Neural Networks 以非丝状PCMO-RRAM作为神经网络突触的1T1R单元增强双极电导线性
2023 7th IEEE Electron Devices Technology & Manufacturing Conference (EDTM) Pub Date : 2023-03-07 DOI: 10.1109/EDTM55494.2023.10103054
J. Sakhuja, Shubham Patil, Sandip Mondal, S. Lashkare, U. Ganguly
{"title":"Enhancement in Bipolar Conductance Linearity by One Transistor - One Resistor (1T1R) cell with Non-Filamentary PCMO-RRAM as Synapse for Neural Networks","authors":"J. Sakhuja, Shubham Patil, Sandip Mondal, S. Lashkare, U. Ganguly","doi":"10.1109/EDTM55494.2023.10103054","DOIUrl":"https://doi.org/10.1109/EDTM55494.2023.10103054","url":null,"abstract":"This work reports conductance linearity enhancement in one-transistor-one-RRAM (1T1R) cell with non-filamentary PCMO-RRAM. First, we show analog resistive switching of PCMO-RRAM(1R) in DC-IV. Second, we demonstrate gradual conductance change (potentiation (LTP) /depression (LTD)) in transient-IV. Third, an electrical connection defined between a commercialized transistor and fabricated PCMO-RRAM emulates 1T1R, demonstrating resistive switching via transistor(1T). Finally, improved conductance linearity $(25X in LTP/5X in LTD)$ with 1T1R is shown, which is best compared with state-of-the-art RRAM devices.","PeriodicalId":418413,"journal":{"name":"2023 7th IEEE Electron Devices Technology & Manufacturing Conference (EDTM)","volume":"69 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2023-03-07","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"132216072","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Integrated Wafer and Die Level Simulation of Back End of Line Chemical Mechanical Polishing Processes 生产线后端化学机械抛光过程的集成晶圆和模具级仿真
2023 7th IEEE Electron Devices Technology & Manufacturing Conference (EDTM) Pub Date : 2023-03-07 DOI: 10.1109/EDTM55494.2023.10103106
Ushasree Katakamsetty, Stefan Nikolaev Voykov, B. Vasilev, S. Nakagawa, T. Tugbawa, Jansen Chee, A. Gower-Hall, Brian Lee, Weiyang Zhu, Bifeng Li, Kimiko Ichikawa
{"title":"Integrated Wafer and Die Level Simulation of Back End of Line Chemical Mechanical Polishing Processes","authors":"Ushasree Katakamsetty, Stefan Nikolaev Voykov, B. Vasilev, S. Nakagawa, T. Tugbawa, Jansen Chee, A. Gower-Hall, Brian Lee, Weiyang Zhu, Bifeng Li, Kimiko Ichikawa","doi":"10.1109/EDTM55494.2023.10103106","DOIUrl":"https://doi.org/10.1109/EDTM55494.2023.10103106","url":null,"abstract":"The Chemical Mechanical Polishing (CMP) variation on a die is a function of the die's location on the wafer [1]. Consequently, the number of CMP hotspots and the hotspot locations can vary from die-to-die on a given wafer. In this paper, we demonstrate the accuracy of Cadence's integrated wafer and die level CMP model in predicting the CMP variation on multiple dies across product chip wafers.","PeriodicalId":418413,"journal":{"name":"2023 7th IEEE Electron Devices Technology & Manufacturing Conference (EDTM)","volume":"34 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2023-03-07","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"132508700","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Fabrication of AlGaN/GaN MIS-HEMTs with Post-growth Annealing 生长后退火法制备AlGaN/GaN mis_hemt
2023 7th IEEE Electron Devices Technology & Manufacturing Conference (EDTM) Pub Date : 2023-03-07 DOI: 10.1109/EDTM55494.2023.10103090
Meihua Liu, Yong Zhang, Guoyong Huang
{"title":"Fabrication of AlGaN/GaN MIS-HEMTs with Post-growth Annealing","authors":"Meihua Liu, Yong Zhang, Guoyong Huang","doi":"10.1109/EDTM55494.2023.10103090","DOIUrl":"https://doi.org/10.1109/EDTM55494.2023.10103090","url":null,"abstract":"We present a systematic investigation on the fabrication of AlGaN/GaN MIS-HEMTs with silicon nitride $(text{SiN}_{mathrm{x}})$ post-growth annealing process after LPCVD. When the post-growth annealing in O2 at 650 °C, the dynamic ON-resistance $(R_{ON})$ is only 30% increase at 600 V drain bias, while the RON increases by 8 times at 100 V drain bias for the MIS-HEMT without post-growth annealing. Post-growth annealing can improve the reliability of device.","PeriodicalId":418413,"journal":{"name":"2023 7th IEEE Electron Devices Technology & Manufacturing Conference (EDTM)","volume":"7 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2023-03-07","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"134369574","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Application of Deep Artificial Neural Network to Model Characteristic Fluctuation of Multi-Channel Gate-All-Around Silicon Nanosheet and Nanofin MOSFETs Induced by Random Nanosized Metal Grains 应用深度人工神经网络模拟随机纳米金属颗粒诱导的多通道栅极全能硅纳米片和纳米fin mosfet的特性波动
2023 7th IEEE Electron Devices Technology & Manufacturing Conference (EDTM) Pub Date : 2023-03-07 DOI: 10.1109/EDTM55494.2023.10103042
S. Dash, Yiming Li, W. Sung
{"title":"Application of Deep Artificial Neural Network to Model Characteristic Fluctuation of Multi-Channel Gate-All-Around Silicon Nanosheet and Nanofin MOSFETs Induced by Random Nanosized Metal Grains","authors":"S. Dash, Yiming Li, W. Sung","doi":"10.1109/EDTM55494.2023.10103042","DOIUrl":"https://doi.org/10.1109/EDTM55494.2023.10103042","url":null,"abstract":"In this work, we propose a deep artificial neural network (D-ANN) to estimate the work function fluctuation (WKF) on 4-channel stacked gate-all-around (GAA) silicon (Si) nanosheet (NS) and nanofin (NF) MOSFET devices for the first time. The 2-layered simple deep model can well predict the transfer characteristics for both NS/NF FET with a large number of (128) input features, utilizing considerably lesser (1100 samples) data uniformly. The resultant model is evaluated by the $mathrm{R}^{2}$ score and RMSE to witness its competency and the average error is $< 4%$. We do also discuss the circuit simulation possibility by applying the ANN approach.","PeriodicalId":418413,"journal":{"name":"2023 7th IEEE Electron Devices Technology & Manufacturing Conference (EDTM)","volume":"25 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2023-03-07","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"133079957","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
A Closer Look to Fan-out Panel Level Packaging 仔细看看扇形面板级包装
2023 7th IEEE Electron Devices Technology & Manufacturing Conference (EDTM) Pub Date : 2023-03-07 DOI: 10.1109/EDTM55494.2023.10102969
T. Braun, O. Hölck, M. Voitel, Mattis Obst, S. Voges, K. Becker, R. Aschenbrenner, M. Schneider-Ramelow
{"title":"A Closer Look to Fan-out Panel Level Packaging","authors":"T. Braun, O. Hölck, M. Voitel, Mattis Obst, S. Voges, K. Becker, R. Aschenbrenner, M. Schneider-Ramelow","doi":"10.1109/EDTM55494.2023.10102969","DOIUrl":"https://doi.org/10.1109/EDTM55494.2023.10102969","url":null,"abstract":"Fan-out Wafer and Panel Level Packaging are two of the dominating trends in microelectronics packaging. Both approaches with different flavors as RDL last face-up or face-down have reached maturity and are introduced in high volume manufacturing. This paper discusses warpage in detail as one key challenge in fan-out packaging and how to influence the warpage during processing of a reconfigured panel for Chip first / RDL last approach.","PeriodicalId":418413,"journal":{"name":"2023 7th IEEE Electron Devices Technology & Manufacturing Conference (EDTM)","volume":"20 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2023-03-07","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"125227539","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Effects of Unisolated Top Gate on Performance of Dual-Gate InGaZnO Thin-Film Transistor 非隔离顶栅对双栅InGaZnO薄膜晶体管性能的影响
2023 7th IEEE Electron Devices Technology & Manufacturing Conference (EDTM) Pub Date : 2023-03-07 DOI: 10.1109/EDTM55494.2023.10103072
C. Zhang, Xiaodong Huang
{"title":"Effects of Unisolated Top Gate on Performance of Dual-Gate InGaZnO Thin-Film Transistor","authors":"C. Zhang, Xiaodong Huang","doi":"10.1109/EDTM55494.2023.10103072","DOIUrl":"https://doi.org/10.1109/EDTM55494.2023.10103072","url":null,"abstract":"The amorphous material InGaZnO (IGZO) is sensitive to air humidity, resulting in the formation of metal-hydroxyl defects and causing stability issue of thin-film transistor (TFT). The stability issue is suppressed by depositing a metal layer directly on the IGZO layer in this work. Moreover, the mobility of the device is improved when a Ti metal layer is deposited on the IGZO semiconductor layer. The proposed TFT shows potential for switching element in Active Matrix Liquid Crystal Displays (AMLCDs) pixel unit.","PeriodicalId":418413,"journal":{"name":"2023 7th IEEE Electron Devices Technology & Manufacturing Conference (EDTM)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2023-03-07","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"133155300","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Thermal Modeling of 2.5D Integrated Package of CMOS Image Sensor and FPGA for Autonomous Driving 面向自动驾驶的2.5D CMOS图像传感器和FPGA集成封装热建模
2023 7th IEEE Electron Devices Technology & Manufacturing Conference (EDTM) Pub Date : 2023-03-07 DOI: 10.1109/EDTM55494.2023.10102948
Janak Sharda, Madison Manley, Ankit Kaul, Wantong Li, M. Bakir, Shimeng Yu
{"title":"Thermal Modeling of 2.5D Integrated Package of CMOS Image Sensor and FPGA for Autonomous Driving","authors":"Janak Sharda, Madison Manley, Ankit Kaul, Wantong Li, M. Bakir, Shimeng Yu","doi":"10.1109/EDTM55494.2023.10102948","DOIUrl":"https://doi.org/10.1109/EDTM55494.2023.10102948","url":null,"abstract":"Deep learning algorithms for autonomous driving require significant data movement between the camera and the processor. We propose using 2.5D integration of a CMOS image sensor (CIS) and FPGA on silicon interposer to reduce the latency and energy consumption due to data movement. Thermal simulations of the full system show an increase in CIS temperature due to 2.5D integration. The reduction in energy consumption due to data movement is $48times$ and in latency is $24times$.","PeriodicalId":418413,"journal":{"name":"2023 7th IEEE Electron Devices Technology & Manufacturing Conference (EDTM)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2023-03-07","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128818577","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Selective Area Carrier Concentration Modulation of Single Crystal $beta$-Ga2O3 film Through High Temperature Oxygen Annealing Process 单晶$beta$-Ga2O3薄膜的高温氧退火选择性载流子浓度调制
2023 7th IEEE Electron Devices Technology & Manufacturing Conference (EDTM) Pub Date : 2023-03-07 DOI: 10.1109/EDTM55494.2023.10103004
Qiming He, Qiuyan Li, Xuanze Zhou, Qi Liu, Weibing Hao, Zhao Han, Guangwei Xu, Xiaojun Wu, Shibing Long
{"title":"Selective Area Carrier Concentration Modulation of Single Crystal $beta$-Ga2O3 film Through High Temperature Oxygen Annealing Process","authors":"Qiming He, Qiuyan Li, Xuanze Zhou, Qi Liu, Weibing Hao, Zhao Han, Guangwei Xu, Xiaojun Wu, Shibing Long","doi":"10.1109/EDTM55494.2023.10103004","DOIUrl":"https://doi.org/10.1109/EDTM55494.2023.10103004","url":null,"abstract":"In this work, we demonstrate that high-temperature oxygen annealing, a unique and low-cost process, can be used to selectively modulate the carrier concentration of $beta-text{Ga}_{2}mathrm{O}_{3}$ film. The design rules of the main process steps are explored in conjunction with the electrical characterization results. In addition, further optimization of the process technology is also discussed. This research broadens the device manufacturing method and will further extend the cost advantage of the $beta-text{Ga}_{2}mathrm{O}_{3}$ device.","PeriodicalId":418413,"journal":{"name":"2023 7th IEEE Electron Devices Technology & Manufacturing Conference (EDTM)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2023-03-07","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131863439","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Heteroepitaxial InP growth on a Si(001) substrate using a Ge buffer layer in MOCVD 在MOCVD中使用Ge缓冲层在Si(001)衬底上外延生长InP
2023 7th IEEE Electron Devices Technology & Manufacturing Conference (EDTM) Pub Date : 2023-03-07 DOI: 10.1109/EDTM55494.2023.10102975
Keun Wook Shin, Sang-Moon Lee, Kiyoung Lee, E. Yoon
{"title":"Heteroepitaxial InP growth on a Si(001) substrate using a Ge buffer layer in MOCVD","authors":"Keun Wook Shin, Sang-Moon Lee, Kiyoung Lee, E. Yoon","doi":"10.1109/EDTM55494.2023.10102975","DOIUrl":"https://doi.org/10.1109/EDTM55494.2023.10102975","url":null,"abstract":"In this study, we grew InP heteroepitaxial layers on Si(001) substrates with Ge buffer layers. We found out that surface of InP layer was smoothened by adjusting Ge buffer layer. In addition, the suppression of planar defects in InP leaded to the improved crystallinity and optical properties, in spite of the increased threading dislocations. Our study suggested the possibility of combination of III-V and Ge for the future CMOS technologies.","PeriodicalId":418413,"journal":{"name":"2023 7th IEEE Electron Devices Technology & Manufacturing Conference (EDTM)","volume":"107 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2023-03-07","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"117289007","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
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