J. Sakhuja, Shubham Patil, Sandip Mondal, S. Lashkare, U. Ganguly
{"title":"以非丝状PCMO-RRAM作为神经网络突触的1T1R单元增强双极电导线性","authors":"J. Sakhuja, Shubham Patil, Sandip Mondal, S. Lashkare, U. Ganguly","doi":"10.1109/EDTM55494.2023.10103054","DOIUrl":null,"url":null,"abstract":"This work reports conductance linearity enhancement in one-transistor-one-RRAM (1T1R) cell with non-filamentary PCMO-RRAM. First, we show analog resistive switching of PCMO-RRAM(1R) in DC-IV. Second, we demonstrate gradual conductance change (potentiation (LTP) /depression (LTD)) in transient-IV. Third, an electrical connection defined between a commercialized transistor and fabricated PCMO-RRAM emulates 1T1R, demonstrating resistive switching via transistor(1T). Finally, improved conductance linearity $(25X\\ in\\ LTP/5X\\ in\\ LTD)$ with 1T1R is shown, which is best compared with state-of-the-art RRAM devices.","PeriodicalId":418413,"journal":{"name":"2023 7th IEEE Electron Devices Technology & Manufacturing Conference (EDTM)","volume":"69 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2023-03-07","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"Enhancement in Bipolar Conductance Linearity by One Transistor - One Resistor (1T1R) cell with Non-Filamentary PCMO-RRAM as Synapse for Neural Networks\",\"authors\":\"J. Sakhuja, Shubham Patil, Sandip Mondal, S. Lashkare, U. Ganguly\",\"doi\":\"10.1109/EDTM55494.2023.10103054\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"This work reports conductance linearity enhancement in one-transistor-one-RRAM (1T1R) cell with non-filamentary PCMO-RRAM. First, we show analog resistive switching of PCMO-RRAM(1R) in DC-IV. Second, we demonstrate gradual conductance change (potentiation (LTP) /depression (LTD)) in transient-IV. Third, an electrical connection defined between a commercialized transistor and fabricated PCMO-RRAM emulates 1T1R, demonstrating resistive switching via transistor(1T). Finally, improved conductance linearity $(25X\\\\ in\\\\ LTP/5X\\\\ in\\\\ LTD)$ with 1T1R is shown, which is best compared with state-of-the-art RRAM devices.\",\"PeriodicalId\":418413,\"journal\":{\"name\":\"2023 7th IEEE Electron Devices Technology & Manufacturing Conference (EDTM)\",\"volume\":\"69 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2023-03-07\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2023 7th IEEE Electron Devices Technology & Manufacturing Conference (EDTM)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/EDTM55494.2023.10103054\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2023 7th IEEE Electron Devices Technology & Manufacturing Conference (EDTM)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/EDTM55494.2023.10103054","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Enhancement in Bipolar Conductance Linearity by One Transistor - One Resistor (1T1R) cell with Non-Filamentary PCMO-RRAM as Synapse for Neural Networks
This work reports conductance linearity enhancement in one-transistor-one-RRAM (1T1R) cell with non-filamentary PCMO-RRAM. First, we show analog resistive switching of PCMO-RRAM(1R) in DC-IV. Second, we demonstrate gradual conductance change (potentiation (LTP) /depression (LTD)) in transient-IV. Third, an electrical connection defined between a commercialized transistor and fabricated PCMO-RRAM emulates 1T1R, demonstrating resistive switching via transistor(1T). Finally, improved conductance linearity $(25X\ in\ LTP/5X\ in\ LTD)$ with 1T1R is shown, which is best compared with state-of-the-art RRAM devices.