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Proceedings of IEEE Bipolar/BiCMOS Circuits and Technology Meeting最新文献

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BiCMOS h/sub fe/ degradation: causes and circuit solution BiCMOS h/sub /劣化:原因及电路解决方案
Proceedings of IEEE Bipolar/BiCMOS Circuits and Technology Meeting Pub Date : 1994-10-10 DOI: 10.1109/BIPOL.1994.587893
C. McAndrew, I. Kizilyalli, J. Bude
{"title":"BiCMOS h/sub fe/ degradation: causes and circuit solution","authors":"C. McAndrew, I. Kizilyalli, J. Bude","doi":"10.1109/BIPOL.1994.587893","DOIUrl":"https://doi.org/10.1109/BIPOL.1994.587893","url":null,"abstract":"h/sub fe/ degradation decreases BiCMOS speed and reliability. This paper presents the physical mechanisms of h/sub fe/ degradation, and a new, simple circuit technique that increases BiCMOS reliability and allows BiCMOS technologies to have lower breakdown voltages.","PeriodicalId":373721,"journal":{"name":"Proceedings of IEEE Bipolar/BiCMOS Circuits and Technology Meeting","volume":"103 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1994-10-10","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115517209","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
An ECL gate with improved speed and low power in BiCMOS process 一种提高BiCMOS工艺速度和低功耗的ECL栅极
Proceedings of IEEE Bipolar/BiCMOS Circuits and Technology Meeting Pub Date : 1994-10-10 DOI: 10.1109/BIPOL.1994.587872
V. Oklobdzija
{"title":"An ECL gate with improved speed and low power in BiCMOS process","authors":"V. Oklobdzija","doi":"10.1109/BIPOL.1994.587872","DOIUrl":"https://doi.org/10.1109/BIPOL.1994.587872","url":null,"abstract":"An ECL gate exhibiting an improved speed-power product over the circuits presented in the past is described. The improvement is due to a combination of a push-pull output stage driven by a controlled current source. This circuit has better driving capabilities and improved speed, yet it uses an order of magnitude less power than regular ECL gate. Fully bipolar realization of this circuit is also possible.","PeriodicalId":373721,"journal":{"name":"Proceedings of IEEE Bipolar/BiCMOS Circuits and Technology Meeting","volume":"24 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1994-10-10","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114585157","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 7
52 GHz epitaxial base bipolar transistor with high Early voltage of 26.5 V with box-like base and retrograded collector impurity profiles 52 GHz外延基极双极晶体管，早期电压高达26.5 V，具有盒状基极和逆行集电极杂质谱
Proceedings of IEEE Bipolar/BiCMOS Circuits and Technology Meeting Pub Date : 1994-10-10 DOI: 10.1109/BIPOL.1994.587898
K. Inou, S. Matsuda, H. Nakajima, N. Sugiyama, K. Usuda, S. Imai, Y. Kawaguchi, K. Yamada, Y. Katsumata, H. Iwai
{"title":"52 GHz epitaxial base bipolar transistor with high Early voltage of 26.5 V with box-like base and retrograded collector impurity profiles","authors":"K. Inou, S. Matsuda, H. Nakajima, N. Sugiyama, K. Usuda, S. Imai, Y. Kawaguchi, K. Yamada, Y. Katsumata, H. Iwai","doi":"10.1109/BIPOL.1994.587898","DOIUrl":"https://doi.org/10.1109/BIPOL.1994.587898","url":null,"abstract":"UHV-CVD epitaxial base transistors having 52 GHz cutoff frequency and 26.5 V Early voltage have been fabricated by adopting a box like base and retrograded collector impurity profiles. In addition, to improve the epitaxial film quality, a hydrotermination technique is used.","PeriodicalId":373721,"journal":{"name":"Proceedings of IEEE Bipolar/BiCMOS Circuits and Technology Meeting","volume":"32 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1994-10-10","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"127000038","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 2
Modeling and simulation of package and interconnects 封装与互连的建模与仿真
Proceedings of IEEE Bipolar/BiCMOS Circuits and Technology Meeting Pub Date : 1994-10-10 DOI: 10.1109/BIPOL.1994.587855
Jerry L. Prince
{"title":"Modeling and simulation of package and interconnects","authors":"Jerry L. Prince","doi":"10.1109/BIPOL.1994.587855","DOIUrl":"https://doi.org/10.1109/BIPOL.1994.587855","url":null,"abstract":"This paper discusses electrical design of off chip and on-chip interconnects. Modeling and Simulation CAD tools used for this design are identified and described. The focus of the paper is on off-chip interconnects, which are loosely referred to as packaging structures. These may be single-chip package interconnects, or connections between chips in a multiple-chip system, and include chip electrical connections (bondwires, C4, etc.) and package or connector pins/bumps. Phenomena which are critical to error-free product performance are discussed, and alternative methods of modeling and simulating these phenomena are presented. Similarities and differences of on-chip and off-chip interconnect characteristics are noted when appropriate.","PeriodicalId":373721,"journal":{"name":"Proceedings of IEEE Bipolar/BiCMOS Circuits and Technology Meeting","volume":"14 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1994-10-10","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"130657819","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Fully analogue LMS adaptive notch filter in BiCMOS technology [SLIC appls] 基于BiCMOS技术的全模拟LMS自适应陷波滤波器[SLIC应用]
Proceedings of IEEE Bipolar/BiCMOS Circuits and Technology Meeting Pub Date : 1994-10-10 DOI: 10.1109/BIPOL.1994.587867
T. Linder, H. Zojer, B. Seger
{"title":"Fully analogue LMS adaptive notch filter in BiCMOS technology [SLIC appls]","authors":"T. Linder, H. Zojer, B. Seger","doi":"10.1109/BIPOL.1994.587867","DOIUrl":"https://doi.org/10.1109/BIPOL.1994.587867","url":null,"abstract":"A fully analogue adaptive notch filter for meter pulse applications in analogue subscriber line systems is presented. Processed in 1 /spl mu/m BiCMOS this circuit uses the benefits of accurate SC-filters, low offset comparators and linear multipliers.","PeriodicalId":373721,"journal":{"name":"Proceedings of IEEE Bipolar/BiCMOS Circuits and Technology Meeting","volume":"129 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1994-10-10","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114540571","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 15
SPICE Early modeling [bipolar transistors] 早期建模[双极晶体管]
Proceedings of IEEE Bipolar/BiCMOS Circuits and Technology Meeting Pub Date : 1994-10-10 DOI: 10.1109/BIPOL.1994.587882
C. McAndrew, L. Nagel
{"title":"SPICE Early modeling [bipolar transistors]","authors":"C. McAndrew, L. Nagel","doi":"10.1109/BIPOL.1994.587882","DOIUrl":"https://doi.org/10.1109/BIPOL.1994.587882","url":null,"abstract":"Gives the real reason for the approximations made in the SPICE Gummel-Poon model Early effect formulation, and a new consistent, coupled method to determine forward and reverse Early voltages of bipolar junction transistors accurately.","PeriodicalId":373721,"journal":{"name":"Proceedings of IEEE Bipolar/BiCMOS Circuits and Technology Meeting","volume":"56 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1994-10-10","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114607563","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 7
The analysis of silicon bipolar transistor scaling-down scheme for low noise and low power analog application 低噪声低功耗模拟应用中硅双极晶体管缩小方案的分析
Proceedings of IEEE Bipolar/BiCMOS Circuits and Technology Meeting Pub Date : 1994-10-10 DOI: 10.1109/BIPOL.1994.587856
N. Itoh, Y. Yoshida, S. Watanabe, Y. Katsumata, H. Iwai
{"title":"The analysis of silicon bipolar transistor scaling-down scheme for low noise and low power analog application","authors":"N. Itoh, Y. Yoshida, S. Watanabe, Y. Katsumata, H. Iwai","doi":"10.1109/BIPOL.1994.587856","DOIUrl":"https://doi.org/10.1109/BIPOL.1994.587856","url":null,"abstract":"A scheme for scaling-down of the silicon analog bipolar transistors has been investigated in detail in terms of power consumption, noise figure and associated power gain. There is an appropriate scaling approach for the analog bipolars.","PeriodicalId":373721,"journal":{"name":"Proceedings of IEEE Bipolar/BiCMOS Circuits and Technology Meeting","volume":"14 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1994-10-10","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128917731","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
Thermally induced current constriction in III-V heterojunction bipolar transistors III-V异质结双极晶体管的热感应电流收缩
Proceedings of IEEE Bipolar/BiCMOS Circuits and Technology Meeting Pub Date : 1994-10-10 DOI: 10.1109/BIPOL.1994.587878
E. Koenig, J. Schneider, U. Seiler, U. Erben
{"title":"Thermally induced current constriction in III-V heterojunction bipolar transistors","authors":"E. Koenig, J. Schneider, U. Seiler, U. Erben","doi":"10.1109/BIPOL.1994.587878","DOIUrl":"https://doi.org/10.1109/BIPOL.1994.587878","url":null,"abstract":"The current through HBTs with different emitter lengths is shown to be constricted to practically identical areas as a result of the lateral temperature distribution and negative temperature coefficient of the base-emitter voltage.","PeriodicalId":373721,"journal":{"name":"Proceedings of IEEE Bipolar/BiCMOS Circuits and Technology Meeting","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1994-10-10","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"130283426","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
A 4ns 0.5u BiCMOS TTL 22V10-PAL 一个4ns 0.5u BiCMOS TTL 22V10-PAL
Proceedings of IEEE Bipolar/BiCMOS Circuits and Technology Meeting Pub Date : 1994-10-10 DOI: 10.1109/BIPOL.1994.587851
S. Wong, D. Yu., R. Bettman, S. Pai, Y. Koh, D. Wong, J. Kleine, F. Jenne
{"title":"A 4ns 0.5u BiCMOS TTL 22V10-PAL","authors":"S. Wong, D. Yu., R. Bettman, S. Pai, Y. Koh, D. Wong, J. Kleine, F. Jenne","doi":"10.1109/BIPOL.1994.587851","DOIUrl":"https://doi.org/10.1109/BIPOL.1994.587851","url":null,"abstract":"This paper describes a very high speed 22V10-type Programmable Logic Array which has been designed and fabricated with a 0.5 u BiCMOS process. A 4 ns propagation delay is achieved by a 600 mv signal swing in the input buffer and sense amp design.","PeriodicalId":373721,"journal":{"name":"Proceedings of IEEE Bipolar/BiCMOS Circuits and Technology Meeting","volume":"15 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1994-10-10","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131675103","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
SiGe HBTs reach the microwave and millimeter-wave frontier SiGe hbt达到微波和毫米波边界
Proceedings of IEEE Bipolar/BiCMOS Circuits and Technology Meeting Pub Date : 1994-10-10 DOI: 10.1109/BIPOL.1994.587884
C. Kermarrec, T. Tewksbury, G. Dawe, R. Baines, B. Meyerson, D. Harame, M. Gilbert
{"title":"SiGe HBTs reach the microwave and millimeter-wave frontier","authors":"C. Kermarrec, T. Tewksbury, G. Dawe, R. Baines, B. Meyerson, D. Harame, M. Gilbert","doi":"10.1109/BIPOL.1994.587884","DOIUrl":"https://doi.org/10.1109/BIPOL.1994.587884","url":null,"abstract":"Silicon germanium heterojunction bipolar transistors (SiGe HBTs) offer significant performance and cost advantages over conventional technologies in the production of integrated circuits for communications, computer and transportation applications. This paper reviews the status of SiGe development, compares SiGe with existing Si and GaAs technologies, and discusses applications extending into the microwave and millimeter-wave regime.","PeriodicalId":373721,"journal":{"name":"Proceedings of IEEE Bipolar/BiCMOS Circuits and Technology Meeting","volume":"40 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1994-10-10","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124898055","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 10
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