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Proceedings of IEEE Bipolar/BiCMOS Circuits and Technology Meeting最新文献

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An adjustment-free single-chip video signal processing LSI for VHS VCRs 用于VHS录像机的免调节单片视频信号处理LSI
Proceedings of IEEE Bipolar/BiCMOS Circuits and Technology Meeting Pub Date : 1994-10-10 DOI: 10.1109/BIPOL.1994.587890
Norihisa Yamamoto, O. Nakagawa, Kenji Takebuchi, Y. Kitamura
{"title":"An adjustment-free single-chip video signal processing LSI for VHS VCRs","authors":"Norihisa Yamamoto, O. Nakagawa, Kenji Takebuchi, Y. Kitamura","doi":"10.1109/BIPOL.1994.587890","DOIUrl":"https://doi.org/10.1109/BIPOL.1994.587890","url":null,"abstract":"The authors have developed an adjustment-free single-chip video signal processing LSI for VHS VCRs. This LSI's adjustment-free system was realized by using automatic feedback loop circuits. This paper describes how the LSI has succeeded in being adjustment-free on frequency modulation (FM) carrier-frequency/deviation and an output video signal amplitude.","PeriodicalId":373721,"journal":{"name":"Proceedings of IEEE Bipolar/BiCMOS Circuits and Technology Meeting","volume":"60 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1994-10-10","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"125649471","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Measurements and simulations of breakdown phenomena in a voltage-scalable smart power complementary BiCMOS process 电压可扩展智能电源互补BiCMOS工艺中击穿现象的测量与模拟
Proceedings of IEEE Bipolar/BiCMOS Circuits and Technology Meeting Pub Date : 1994-10-10 DOI: 10.1109/BIPOL.1994.587879
R. Ryter, R. Zingg, W. Fichtner
{"title":"Measurements and simulations of breakdown phenomena in a voltage-scalable smart power complementary BiCMOS process","authors":"R. Ryter, R. Zingg, W. Fichtner","doi":"10.1109/BIPOL.1994.587879","DOIUrl":"https://doi.org/10.1109/BIPOL.1994.587879","url":null,"abstract":"Good agreement between 2-D simulations and experiments of device parameters, especially breakdown voltages, allows voltage scaling against cutoff frequency. Measurements and simulations of breakdown phenomena in vertical NPN transistors fabricated with a voltage-scalable smart power complementary BiCMOS process show that the open base and the open emitter breakdown occur at different spatial positions in the device structure.","PeriodicalId":373721,"journal":{"name":"Proceedings of IEEE Bipolar/BiCMOS Circuits and Technology Meeting","volume":"109 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1994-10-10","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"125254738","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
A 14-b 2.5 MSPS pipelined ADC with on chip EPROM 带片上EPROM的14-b 2.5 MSPS流水线ADC
Proceedings of IEEE Bipolar/BiCMOS Circuits and Technology Meeting Pub Date : 1994-10-10 DOI: 10.1109/BIPOL.1994.587844
D. Mercer
{"title":"A 14-b 2.5 MSPS pipelined ADC with on chip EPROM","authors":"D. Mercer","doi":"10.1109/BIPOL.1994.587844","DOIUrl":"https://doi.org/10.1109/BIPOL.1994.587844","url":null,"abstract":"A 14-b 2.5-MSPS, multi-stage pipeline, subranging analog-to-digital converter is presented. In addition to conventional laser-wafer-trim, on chip, \"write once\" EPROM is used to calibrate inter-stage gain errors at package sort. Integral nonlinearity errors as small as +/- 2LSB, and differential nonlinearity errors of -0.6, +0.8 LSB have been achieved. The 5.4 mm by 4.4 mm device includes a 2.5-V reference is built on a 2-/spl mu/m 10-V BiCMOS process and consumes 550 mW of power.","PeriodicalId":373721,"journal":{"name":"Proceedings of IEEE Bipolar/BiCMOS Circuits and Technology Meeting","volume":"9 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1994-10-10","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115272082","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 14
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