Proceedings of 1993 IEEE International SOI Conference最新文献

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Analysis of color variation in bonded SOI wafers 键合SOI晶圆颜色变化分析
Proceedings of 1993 IEEE International SOI Conference Pub Date : 1993-10-05 DOI: 10.1109/SOI.1993.344589
P. Clapis, A. Ledger, K. Daniell
{"title":"Analysis of color variation in bonded SOI wafers","authors":"P. Clapis, A. Ledger, K. Daniell","doi":"10.1109/SOI.1993.344589","DOIUrl":"https://doi.org/10.1109/SOI.1993.344589","url":null,"abstract":"In this paper, we analyze why SOI wafers appear as they do to the naked eye. We show how a thickness variation as small as ten Angstroms can cause a readily discernible color change, and why this optical effect is much stronger in a thinned SOI wafer than in an oxide-coated wafer or in thick SOI wafers.<<ETX>>","PeriodicalId":308249,"journal":{"name":"Proceedings of 1993 IEEE International SOI Conference","volume":"7 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1993-10-05","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"117080638","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
Hot-carrier effects in accumulation-mode thin-film SOI/NMOSFET's 累积模式薄膜SOI/NMOSFET的热载子效应
Proceedings of 1993 IEEE International SOI Conference Pub Date : 1993-10-05 DOI: 10.1109/SOI.1993.344585
Binglong Zhang, T. Ma, L.K. Wang
{"title":"Hot-carrier effects in accumulation-mode thin-film SOI/NMOSFET's","authors":"Binglong Zhang, T. Ma, L.K. Wang","doi":"10.1109/SOI.1993.344585","DOIUrl":"https://doi.org/10.1109/SOI.1993.344585","url":null,"abstract":"Hot-carrier effects in enhancement-mode thin-film SOI/NMOSFET's have been studied quite extensively, but similar studies in accumulation-mode devices are still lacking. This paper will report hot-carrier effects in accumulation-mode thin-film SOI/NMOSFET's. Changes in both front- and back-channel transistor parameters are discussed. One particularly interesting effect is the increased drain-source breakdown voltage when measured in the reverse mode after hot-carrier damage. A model based on the increased hole/electron recombination rate due to hot-carrier induced back interface traps will be proposed to explain the effect.<<ETX>>","PeriodicalId":308249,"journal":{"name":"Proceedings of 1993 IEEE International SOI Conference","volume":"46 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1993-10-05","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129287567","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
Shallow oxygen-related donors in bonded and etchback silicon on insulator structures 绝缘体结构上键合硅和蚀刻硅的浅氧相关给体
Proceedings of 1993 IEEE International SOI Conference Pub Date : 1993-10-05 DOI: 10.1109/SOI.1993.344606
W. L. Warren, D. Fleetwood, J. Schwank, M. Shaneyfelt, P. Winokur, R. Devine, W. Maszara, J.B. McKitterick
{"title":"Shallow oxygen-related donors in bonded and etchback silicon on insulator structures","authors":"W. L. Warren, D. Fleetwood, J. Schwank, M. Shaneyfelt, P. Winokur, R. Devine, W. Maszara, J.B. McKitterick","doi":"10.1109/SOI.1993.344606","DOIUrl":"https://doi.org/10.1109/SOI.1993.344606","url":null,"abstract":"We have investigated fundamental material issues that may impact device performance in bonded and etchback SOI (BESOI) wafers using electron paramagnetic resonance (EPR) measurements. We report a new defect identified as an oxygen-related donor in the virgin Si substrates. The donor appears to result from the anneal during the bonding process, not from the actual bonding procedure.<<ETX>>","PeriodicalId":308249,"journal":{"name":"Proceedings of 1993 IEEE International SOI Conference","volume":"60 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1993-10-05","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"133119627","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
A bulk-JFET and CMOS/SIMOX technology for low noise, high speed charge-sensitive amplifier 采用jfet和CMOS/SIMOX技术实现低噪声、高速电荷敏感放大器
Proceedings of 1993 IEEE International SOI Conference Pub Date : 1993-10-05 DOI: 10.1109/SOI.1993.344544
W. Buttler, G. Cesura, P. Manfredi, V. Re, V. Speziali, Holger Vogt
{"title":"A bulk-JFET and CMOS/SIMOX technology for low noise, high speed charge-sensitive amplifier","authors":"W. Buttler, G. Cesura, P. Manfredi, V. Re, V. Speziali, Holger Vogt","doi":"10.1109/SOI.1993.344544","DOIUrl":"https://doi.org/10.1109/SOI.1993.344544","url":null,"abstract":"Good low-noise and radiation-tolerant behavior has previously been demonstrated for an amplifier design using a bulk JFET-MOS circuit. It is shown in this paper that these advantages and the speed performance are increased using SIMOX technology. A JFET fully compatible with available CMOS/SIMOX technology is used. This JFET requires only a simple modification of the standard process. Using this process extension the good noise performance of JFETs as amplifier input devices can be combined with the high functional density and versatility of MOS in analog and digital switching and storage.<<ETX>>","PeriodicalId":308249,"journal":{"name":"Proceedings of 1993 IEEE International SOI Conference","volume":"20 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1993-10-05","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114655509","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 10
Design methodology for low power, high-speed CMOS devices utilizing SOI technology 采用SOI技术的低功耗、高速CMOS器件的设计方法
Proceedings of 1993 IEEE International SOI Conference Pub Date : 1993-10-05 DOI: 10.1109/SOI.1993.344550
A. Yoshino, K. Kumagai, S. Kurosawa, H. Itoh, K. Okumura
{"title":"Design methodology for low power, high-speed CMOS devices utilizing SOI technology","authors":"A. Yoshino, K. Kumagai, S. Kurosawa, H. Itoh, K. Okumura","doi":"10.1109/SOI.1993.344550","DOIUrl":"https://doi.org/10.1109/SOI.1993.344550","url":null,"abstract":"We have compared CMOS gate performances between bulk and SOI structures, using the circuit simulator SPICE with the simplest assumptions. Main results are as follows: (1) We have demonstrated that it is possible to estimate CMOS/SOI performances using the circuit simulator SPICE without any specific physical models for SOI transistors. (2) The reduction effect of the drain parasitic capacitance by the CMOS/SOI technology becomes more remarkable with a decrease in the supply voltage. (3) Just by increasing the channel width of the CMOS/SOI keeping its power consumption equal to that of the CMOS/BULK, the propagation delay time dependence on large load capacitance can be improved dramatically with higher drivability.<<ETX>>","PeriodicalId":308249,"journal":{"name":"Proceedings of 1993 IEEE International SOI Conference","volume":"16 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1993-10-05","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122569429","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 6
Measurement of minority carrier diffusion length and lifetime in SOI devices by flying spot laser scanner as a function of residual misfit 用飞光斑激光扫描仪测量SOI器件中少数载流子扩散长度和寿命的残差函数
Proceedings of 1993 IEEE International SOI Conference Pub Date : 1993-10-05 DOI: 10.1109/SOI.1993.344600
H. Baumgart, R. Egloff, E. Arnold, T. Letavic, S. Merchant, S. Mukherjee, H. Bhimnathwala
{"title":"Measurement of minority carrier diffusion length and lifetime in SOI devices by flying spot laser scanner as a function of residual misfit","authors":"H. Baumgart, R. Egloff, E. Arnold, T. Letavic, S. Merchant, S. Mukherjee, H. Bhimnathwala","doi":"10.1109/SOI.1993.344600","DOIUrl":"https://doi.org/10.1109/SOI.1993.344600","url":null,"abstract":"The recombination properties of minority carriers determine the basic electronic properties of SOI materials and control the performance of a variety of SOI devices. Knowledge of the minority carrier recombination characteristics and its correlation to residual defect density is important for the evaluation of SOI technologies with varying degrees of crystal lattice imperfection. In this work we first describe a technique based on a flying spot laser scan microscope for the measurement of minority carrier diffusion length, L, and lifetime, /spl tau/, in SOI high voltage diodes. In our experiment, laser light of 633 nm wavelength is absorbed in the Si material through the generation of electron-hole pairs which, if generated in the depletion region, are separated by the high local field to give rise to a photocurrent that can be measured.<<ETX>>","PeriodicalId":308249,"journal":{"name":"Proceedings of 1993 IEEE International SOI Conference","volume":"31 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1993-10-05","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"121160799","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Ultra-thin-film SOI technology and its application to next generation CMOS devices 超薄膜SOI技术及其在下一代CMOS器件中的应用
Proceedings of 1993 IEEE International SOI Conference Pub Date : 1993-10-05 DOI: 10.1109/SOI.1993.344613
S. Kawamura
{"title":"Ultra-thin-film SOI technology and its application to next generation CMOS devices","authors":"S. Kawamura","doi":"10.1109/SOI.1993.344613","DOIUrl":"https://doi.org/10.1109/SOI.1993.344613","url":null,"abstract":"Although silicon-on-insulator (SOI) technology has been developed for over a quarter of a century, it has been in use only in specialized niche applications such as space and defense electronics systems. This is mainly because SOI manufacturing yields have been considered to be lower than their conventional bulk counterparts. In spite of the recent development of fully depleted SOI devices fabricated in ultra-thin silicon on insulator films which are considered very attractive for high-speed submicron ULSI applications because of the reduced short-channel effect in addition to the generic SOI advantages of latchup immunity and reduced parasitic capacitances, several problems which should be overcome still remain, both in materials and device technology as well as in manufacturing aspects,before thin-film SOI can be considered mainstream. The major potential application for ultra-thin SOI films is quarter micron CMOS devices for advanced logic circuits. It is anticipated that CMOS devices having design rules of 0.25 /spl mu/m or less will be in mass production by the end of this century, and conventional bulk silicon seems to be unsuitable for such ULSI devices mainly because of severe short channel effects. Instead, thin-film SOI with fully depleted silicon films is expected to be an alternative.<<ETX>>","PeriodicalId":308249,"journal":{"name":"Proceedings of 1993 IEEE International SOI Conference","volume":"28 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1993-10-05","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"126482863","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 3
SOI MOSFET with grounded body potential by using the silicon direct bonding (SDB) technology 采用硅直接键合(SDB)技术实现体电位接地的SOI MOSFET
Proceedings of 1993 IEEE International SOI Conference Pub Date : 1993-10-05 DOI: 10.1109/SOI.1993.344574
W. Kang, Sung-Won Kang, Jong-Son Lyu, Sang-Won Kang, Jin-Hyo Lee
{"title":"SOI MOSFET with grounded body potential by using the silicon direct bonding (SDB) technology","authors":"W. Kang, Sung-Won Kang, Jong-Son Lyu, Sang-Won Kang, Jin-Hyo Lee","doi":"10.1109/SOI.1993.344574","DOIUrl":"https://doi.org/10.1109/SOI.1993.344574","url":null,"abstract":"N-channel SOI MOSFET was fabricated by using the silicon direct bonding (SDB) technology, where its body was tied with a grounded p/sup +/ polysilicon for eliminating the substrate floating effect. Fabricated SOI MOSFETs show no kinks on their drain current characteristics and much higher breakdown voltage for lower gate voltages, as compared with SOI MOSFETs with a floating body.<<ETX>>","PeriodicalId":308249,"journal":{"name":"Proceedings of 1993 IEEE International SOI Conference","volume":"34 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1993-10-05","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"133332946","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 2
The effects of floating body operation on hot carrier behavior in SOS MOSFETs 浮体操作对SOS mosfet热载流子行为的影响
Proceedings of 1993 IEEE International SOI Conference Pub Date : 1993-10-05 DOI: 10.1109/SOI.1993.344586
E. Y. Chao, D. Quon, T. Her, G. Li, J. White, P. Liu, R. Kjar
{"title":"The effects of floating body operation on hot carrier behavior in SOS MOSFETs","authors":"E. Y. Chao, D. Quon, T. Her, G. Li, J. White, P. Liu, R. Kjar","doi":"10.1109/SOI.1993.344586","DOIUrl":"https://doi.org/10.1109/SOI.1993.344586","url":null,"abstract":"Hot carrier effects in MOSFETs have been intensively investigated in both bulk silicon and SOI materials. However, there is a lack of hot carrier information in SOS MOSFETs. SOS material differs from bulk material in that electron mobility is lower while hole mobility remains unchanged. Reduced mobility is not observed for holes because the mechanical strain in the epitaxial layer due to lattice mismatch between sapphire and silicon lifts the degenerate valence band significantly to make SOSFETs light hole devices. Since hot hole injection into the oxide is commonly observed in devices biased at low gate voltages, it is of great interest to study the contributions of light hole injection to device degradation mechanisms in both floating and non-floating body operation conditions. In this work, we will investigate the behavior of light holes at the oxide interface, and examine the effects of light hole injection under floating body operation on device degradation.<<ETX>>","PeriodicalId":308249,"journal":{"name":"Proceedings of 1993 IEEE International SOI Conference","volume":"5 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1993-10-05","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122293298","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
SIMOX circuit reliability SIMOX电路可靠性
Proceedings of 1993 IEEE International SOI Conference Pub Date : 1993-10-05 DOI: 10.1109/SOI.1993.344554
L. Cohn, H. Hosack, R. Cherne, P. Fechner
{"title":"SIMOX circuit reliability","authors":"L. Cohn, H. Hosack, R. Cherne, P. Fechner","doi":"10.1109/SOI.1993.344554","DOIUrl":"https://doi.org/10.1109/SOI.1993.344554","url":null,"abstract":"SIMOX SOI materials have the capability to support fabrication of a wide range of large area, high performance, radiation hardened, integrated circuits. Continuous improvements in the quality of SIMOX materials has been demonstrated on a number of DoD programs, and a steady progression of devices from 16 K SRAM complexity to 1 M SRAM complexity have been produced. Even with the outstanding progress demonstrated in fabrication, the reliability of devices produced on SIMOX materials has not been extensively discussed. Of particular interest is the reliability effects of the SIMOX buried oxide, because of the unique processes used in its formation, and the previous identification of various types of defects which may be present. This paper presents reliability data on devices fabricated on SIMOX substrates, as reviewing on-going reliability evaluations of the SIMOX buried oxide itself. Data on circuit reliability testing at several rad-hard IC manufacturers are used to document the ability of SIMOX based devices to meet stringent military reliability qualification requirements. Evaluation of failures in the reliability testing show that the failure modes for SIMOX devices are much the same as for bulk devices. No new failure modes have been found that can be associated with the presence of the buried oxide.<<ETX>>","PeriodicalId":308249,"journal":{"name":"Proceedings of 1993 IEEE International SOI Conference","volume":"87 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1993-10-05","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122951669","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 2
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