{"title":"Gate tunable MoS2-based thermoelectric devices","authors":"M. Kayyalha, Yong P. Chen","doi":"10.1109/DRC.2014.6872317","DOIUrl":"https://doi.org/10.1109/DRC.2014.6872317","url":null,"abstract":"Two dimensional semiconductors and especially MoS2 have gained a lot of attention due to their unique properties. Finite bandgap, large Ion/Ioff ratio, good mobility, and nearly perfect subthreshold slope are among some of the features that make these materials attractive to researchers. While electrical transport has been studied extensively on single and multilayers of these Transition Metal Dichalcogenides (TMDs) [1, 2], to the best of our knowledge, there has been no experimental study on their thermoelectric properties. Recently, it has been predicted that few layers of TMDs can provide extremely large power factor (S2σ) and thus large ZT making them promising candidates as the future thermoelectric devices [3]. Here, for the first time, we explore gate-dependent thermoelectric properties of multilayer MoS2. As one of the important figures of merit for thermoelectric devices, we also calculate power factor which can then be used to find ZT.","PeriodicalId":293780,"journal":{"name":"72nd Device Research Conference","volume":"5 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2014-06-22","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"121786156","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Battery-less impact-logging device consisting of a vibration energy scavenger and ferroelectric memory","authors":"Y. Kaneko, Y. Nishitani, M. Ueda, A. Omote","doi":"10.1109/DRC.2014.6872299","DOIUrl":"https://doi.org/10.1109/DRC.2014.6872299","url":null,"abstract":"Energy scavenging from ambient energy sources has been widely researched with a focus on sensors and devices as alternative power sources for batteries. Vibration energy scavenging is of specific interest for a variety of environments in which sinusoidal vibrations or repetitive impacts are present [1]. In addition, a vibration energy scavenger has applicability to an impact sensor because an applied impact is immediately converted to electrical power. If the impact data are stored at the same time in non-volatile memory by the electrical power generated by impact itself, a battery-less impact-logging system is feasible. However, the generated power alone is insufficient for recording impact histories to conventional non-volatile memory. In this work, we focus on a ferroelectric-gate field-effect transistor (FeFET) as a non-volatile memory [2] because an FeFET is able to memorize data with low power consumption and read the data non-destructively.","PeriodicalId":293780,"journal":{"name":"72nd Device Research Conference","volume":"30 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2014-06-22","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115806194","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Gated piezoresistive GaN microcantilever as an acoustic transducer","authors":"A. Talukdar, G. Koley","doi":"10.1109/DRC.2014.6872292","DOIUrl":"https://doi.org/10.1109/DRC.2014.6872292","url":null,"abstract":"In this article, we present for the first time, transduction of ultrasonic acoustic pressure using a gated piezoresistive AlGaN/GaN Heterojunction Field Effect Transistor (HFET) integrated on GaN microcantilever. With a periodic pressure generated in air, the microcantilever was found to oscillate, and the HFET was able to transduce the pressure variation of 150.4 μPa in ambient conditions with a tunable linear sensitivity of 33.2 mV/Pa, response time <; 40 ms, and power consumption of 45 μW. The device demonstrates 3 orders higher pressure sensitivity than simple piezoresistor, and also higher than the sensitivity of commercially available Knowles microphone; thereby offering a promising alternative for cantilever enhanced photoacoustic spectroscopy (PAS).","PeriodicalId":293780,"journal":{"name":"72nd Device Research Conference","volume":"10 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2014-06-22","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115009627","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
A. Orlov, P. Fay, G. Snider, X. Jehl, S. Barraud, M. Sanquer
{"title":"Detection of the first charged states in ultrasmall Si single-hole transistor using dual-channel radio frequency reflectometry","authors":"A. Orlov, P. Fay, G. Snider, X. Jehl, S. Barraud, M. Sanquer","doi":"10.1109/DRC.2014.6872308","DOIUrl":"https://doi.org/10.1109/DRC.2014.6872308","url":null,"abstract":"Si CMOS single-electron transistors (SET) fabricated using fully depleted SOI [1] enable an understanding of charging mechanisms in ultimately scaled CMOS devices down to a transport through a single dopant [2]. A schematic representation of such a device is shown in Fig 1. Radio-frequency (RF) reflectometry [3] is an effective tool for charge detection in various single-electron systems. Since it does not require any DC current flow the detection of electrons passing even through a single tunnel junction [4] is possible. When a Si SET is populated with electrons, one intriguing question need to be answered: where do the first charge carriers spatially accumulate during the formation of the conducting “island”? To address this issue we use a dual channel technique that enables spatial identification of charging processes within the device. Here we present results obtained using this technique for single-hole transistors (SHT). A micrograph of a typical studied SHT device.","PeriodicalId":293780,"journal":{"name":"72nd Device Research Conference","volume":"49 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2014-06-22","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124763233","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"All-CVD graphene field-effect transistors with h-BN gate dielectric and local back gate","authors":"M. Ebrish, S. Koester","doi":"10.1109/DRC.2014.6872297","DOIUrl":"https://doi.org/10.1109/DRC.2014.6872297","url":null,"abstract":"We have demonstrated operation of locally backgated graphene gFETs with CVD-grown h-BN and graphene, and the results provide important insights into the impact of h-BN on the transport and interfacial properties of these devices.","PeriodicalId":293780,"journal":{"name":"72nd Device Research Conference","volume":"05 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2014-06-22","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123649304","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"High performance flexible CMOS SOI FinFETs","authors":"H. Fahad, G. T. Sevilla, M. Ghoneim, M. Hussain","doi":"10.1109/DRC.2014.6872382","DOIUrl":"https://doi.org/10.1109/DRC.2014.6872382","url":null,"abstract":"We demonstrate the first ever CMOS compatible soft etch back based high performance flexible CMOS SOI FinFETs. The move from planar to non-planar FinFETs has enabled continued scaling down to the 14 nm technology node. This has been possible due to the reduction in off-state leakage and reduced short channel effects on account of the superior electrostatic charge control of multiple gates. At the same time, flexible electronics is an exciting expansion opportunity for next generation electronics. However, a fully integrated low-cost system will need to maintain ultra-large-scale-integration density, high performance and reliability - same as today's traditional electronics. Up until recently, this field has been mainly dominated by very weak performance organic electronics enabled by low temperature processes, conducive to low melting point plastics. Now however, we show the world's highest performing flexible version of 3D FinFET CMOS using a state-of-the-art CMOS compatible fabrication technique for high performance ultra-mobile consumer applications with stylish design.","PeriodicalId":293780,"journal":{"name":"72nd Device Research Conference","volume":"15 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2014-06-22","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122069847","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Enhancement-mode Al2O3/InAlN/GaN MOS-HEMT on Si with high drain current density 0.84 A/mm and threshold voltage of +1.9 V","authors":"J. Freedsman, A. Watanabe, T. Egawa","doi":"10.1109/DRC.2014.6872294","DOIUrl":"https://doi.org/10.1109/DRC.2014.6872294","url":null,"abstract":"In the last decade, AlGaN/GaN based Enhancement-mode (E-mode) devices on Si substrate have been studied extensively [1-3]. In spite of improvements in the threshold voltage (Vth), the AlGaN/GaN E-mode devices could not show high drain current density (Idsmax), which is highly desirable for automotive applications [4, 5]. Alternatively, InAlN/GaN based E-mode devices are preferred for high-temperature and high-speed applications. A few research groups have demonstrated InAlN/GaN based E-mode devices mainly on SiC and sapphire substrates [6-9]. The main focus in this work is to demonstrate high performance InAlN/GaN based E-Mode metal-oxide-semiconductor high-electron-mobility transistors (MOS-HEMT) on low cost Si.","PeriodicalId":293780,"journal":{"name":"72nd Device Research Conference","volume":"323 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2014-06-22","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122709690","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
W. Rieutort-Louis, Liechao Huang, Yingzhe Hu, J. Sanz-Robinson, T. Moy, Y. Afsar, J. Sturm, N. Verma, S. Wagner
{"title":"Current gain of amorphous silicon thin-film transistors above the cutoff frequency","authors":"W. Rieutort-Louis, Liechao Huang, Yingzhe Hu, J. Sanz-Robinson, T. Moy, Y. Afsar, J. Sturm, N. Verma, S. Wagner","doi":"10.1109/DRC.2014.6872403","DOIUrl":"https://doi.org/10.1109/DRC.2014.6872403","url":null,"abstract":"In this paper we (1) show above-ft measurements for standard bottom-gate amorphous silicon (a-Si) TFTs and self-aligned bottom-gate a-Si TFTs and (2) illustrate how large TFT gate-drain capacitances lead to a slow current-gain roll-off at frequencies above ft.","PeriodicalId":293780,"journal":{"name":"72nd Device Research Conference","volume":"24 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2014-06-22","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"125555947","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
S. Law, C. Roberts, S. Inampudi, W. Streyer, A. Rosenberg, V. Podolskiy, D. Wasserman
{"title":"Making the Mid-IR nano with epitaxial plasmonic devices","authors":"S. Law, C. Roberts, S. Inampudi, W. Streyer, A. Rosenberg, V. Podolskiy, D. Wasserman","doi":"10.1109/DRC.2014.6872391","DOIUrl":"https://doi.org/10.1109/DRC.2014.6872391","url":null,"abstract":"We have extensively investigated heavily doped semiconductors as potential plasmonic metals at long wavelengths. The ability to control the doping level in a semiconductor material, both III-V's (InAs/InSb) and Silicon, allows for control of the metal's optical properties, and adds an intriguing additional controllable parameter to the design of plasmonic structures. These materials can be quite accurately modeled using the Drude formalism, even for energies larger than the band gap, and have a number of attractive qualities, including control of carrier concentration (and thus plasma frequency, ωρ), as well as single-crystal material quality, atomic-layer control of thicknesses, and the potential for integration with epitaxially-grown mid-IR optoelectronic devices. In this presentation, I will discuss recent developments in epitaxial plasmonic devices for mid-IR applications. First, the growth and characterization of our materials will be discussed, as well as the material limitations. Subsequently, I will demonstrate the doped semiconductors potential as epsilon-near-zero (ENZ) materials. At ENZ frequencies, we have demonstrated enhanced coupling to sub-wavelength waveguides, offering a potential route towards overcoming the mismatch between the micron-scale light of the mid-IR and the nano-scale. In addition, we have shown that near ENZ, these materials thin (d ≪ λo) loss-less dielectric films to serve as perfect absorbing layers, by controlling the metal/dielectric interface phase shift in thin film interference structures.","PeriodicalId":293780,"journal":{"name":"72nd Device Research Conference","volume":"30 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2014-06-22","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"121045121","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
H. Hlaing, F. Carta, Robert A. Barton, C. Nam, Nicholas Petrone, J. Hone, I. Kymissis
{"title":"Low-power organic electronics based on gate-tunable injection barrier in vertical graphene-organic semiconductor heterostructures","authors":"H. Hlaing, F. Carta, Robert A. Barton, C. Nam, Nicholas Petrone, J. Hone, I. Kymissis","doi":"10.1109/DRC.2014.6872405","DOIUrl":"https://doi.org/10.1109/DRC.2014.6872405","url":null,"abstract":"Novel device architectures based on heterostructures of graphene with semiconductor layers have recently attracted considerable interest due to their potential in a wide range of electronic and photonic applications. The key concept in these devices is to exploit the work function tunability of graphene via external gate field to modulate the current flow across the graphene-semiconductor junction by adjusting the Schottky barrier height. Transistor devices based on a vertical heterojunction of graphene with inorganic semiconductors (n- and p-type Silicon) [1], oxide semiconductor (n-type indium gallium zinc oxide) [2,3] and flakes of 2D layered materials (molybdenum disulfide, tungsten disulfide) [4-7] have been successfully fabricated with a high on/off ratio, overcoming the limitation of planar graphene field-effect devices. We demonstrate, for the first time, low-voltage complementary p- and n-channel vertical organic thin film transistors (VOTFTs) based on the graphene-organic semiconductor heterojunctions with simple, scalable and low-temperature fabrication process. VOTFT device with thin layer of prototypical n-type organic semiconductor C60 exhibits high on-current densities in the range of 10 mA/cm2 with the driving voltage of only 1 V suppressing the output current of traditional planar organic field-effect transistors. It can also operate at the bias as low as 200 mV with high on/off ratio (~103). For low-power logic application, complementary VOTFT devices with prototypical p-type organic semiconductors (CuPc, Pentacene, α-6T, Rubrene) are also investigated.","PeriodicalId":293780,"journal":{"name":"72nd Device Research Conference","volume":"11 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2014-06-22","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"116289529","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}