72nd Device Research Conference最新文献

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Wafer scalable growth and delamination of graphene for silicon heterogeneous VLSI technology 用于硅非均质VLSI技术的石墨烯晶圆可扩展生长和分层
72nd Device Research Conference Pub Date : 2014-06-22 DOI: 10.1109/DRC.2014.6872365
S. Rahimi, S. R. Na, L. Tao, K. Liechti, D. Akinwande
{"title":"Wafer scalable growth and delamination of graphene for silicon heterogeneous VLSI technology","authors":"S. Rahimi, S. R. Na, L. Tao, K. Liechti, D. Akinwande","doi":"10.1109/DRC.2014.6872365","DOIUrl":"https://doi.org/10.1109/DRC.2014.6872365","url":null,"abstract":"We have demonstrated the state-of-the-art on scalable graphene synthesis, device yield and electrical statistics with the highest performance wafer-scale devices showing electronic properties similar to exfoliated flakes. The mechanical delamination of graphene resulted in high material quality due to residue free pristine graphene surface, and holds promise for wafer-scale BEOL bonding integration of graphene with Si CMOS substrates.","PeriodicalId":293780,"journal":{"name":"72nd Device Research Conference","volume":"39 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2014-06-22","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"116601118","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 2
A critical examination of the Mott transistor and emergent phase switches for electronics 莫特晶体管和电子紧急相开关的关键检查
72nd Device Research Conference Pub Date : 2014-06-22 DOI: 10.1109/DRC.2014.6872275
S. Ramanathan, You Zhou
{"title":"A critical examination of the Mott transistor and emergent phase switches for electronics","authors":"S. Ramanathan, You Zhou","doi":"10.1109/DRC.2014.6872275","DOIUrl":"https://doi.org/10.1109/DRC.2014.6872275","url":null,"abstract":"In this presentation, we will discuss device physics of Mott transistors, with emphasis on the following: device-quality correlated materials synthesis that requires reversible phase transitions; transistor fabrication with both solid state (e.g. hafnia) and ionic liquid gates; small signal device response and high frequency characteristics. The question of how to modulate transistor channel resistance at the high density limit will be considered in depth. Complementary learnings from two-terminal devices and electrical switching dynamics in coplanar waveguides will be discussed.","PeriodicalId":293780,"journal":{"name":"72nd Device Research Conference","volume":"6 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2014-06-22","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"116805307","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Investigation of switching mechanism in forming-free multi-level resistive memories with atomic layer deposited HfTiOx nanolaminate 纳米层HfTiOx原子层沉积的无形成多层电阻存储器开关机制研究
72nd Device Research Conference Pub Date : 2014-06-22 DOI: 10.1109/DRC.2014.6872330
B. Chakrabarti, E. Miranda, E. Vogel
{"title":"Investigation of switching mechanism in forming-free multi-level resistive memories with atomic layer deposited HfTiOx nanolaminate","authors":"B. Chakrabarti, E. Miranda, E. Vogel","doi":"10.1109/DRC.2014.6872330","DOIUrl":"https://doi.org/10.1109/DRC.2014.6872330","url":null,"abstract":"Forming-free resistive memories (RRAM) have recently attracted significant attention as the forming process requires high voltage and can lead to low yield because of current overshoot [1-2]. We have recently demonstrated forming-free switching with multi-level operation in TiN/HfTiOx/TiN resistive memories [3]. However, a fundamental understanding of the switching mechanisms is lacking. Recently the Quantum Point Contact model (QPC) has been applied to analyze switching behavior of conductive filament based resistive memories [4-5]. Investigation of multi-level switching in HfTiOx-based resistive memories using the QPC model has not been attempted previously. In this work we have investigated the multi-level conduction mechanism of forming-free HfTiOx RRAMs using the QPC model. We demonstrate that the model can successfully describe the entire dynamic range of multi-level switching for the HfTiOx RRAMs.","PeriodicalId":293780,"journal":{"name":"72nd Device Research Conference","volume":"10 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2014-06-22","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114841264","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Multi-layer MoTe2 p-channel MOSFETs with high drive current 具有高驱动电流的多层MoTe2 p沟道mosfet
72nd Device Research Conference Pub Date : 2014-06-22 DOI: 10.1109/DRC.2014.6872352
N. Haratipour, S. Koester
{"title":"Multi-layer MoTe2 p-channel MOSFETs with high drive current","authors":"N. Haratipour, S. Koester","doi":"10.1109/DRC.2014.6872352","DOIUrl":"https://doi.org/10.1109/DRC.2014.6872352","url":null,"abstract":"Transition metal dichalcogenides (TMDs) are interesting materials for electronic applications due to their layered crystal structure, which offers the potential to realize transistors with ultra-thin or even monolayer body thicknesses [1]. Unlike single-layer graphene, TMDs typically have band gaps in the range of 1-2 eV, making them suitable for logic transistor applications [2]. MoTe2 is an ideal material for p-MOSFETs due to its low electron affinity and relatively narrow band gap of ~ 1 eV [3]. MoTe2 is also of interest for realizing tunneling field effect transistors (TFETs) with highly-staggered or broken-gap band alignments [4], particularly when integrated with high electron affinity TMDs, such as SnSe2 [5]. However, to date, only n-MOSFETs and ambipolar transistors have been demonstrated experimentally using thin-film MoTe2 [6, 7]. In this work, we report the characteristics of p-MOSFETs using exfoliated MoTe2 with Pd contact metallization. We characterize the properties of these backgated devices as a function of temperature and extract the Schottky barrier height of the Pd metallization. We also show that strong p-type doping occurs in these devices after prolonged exposure to ambient atmosphere, resulting in p-MOSFETs with linear contacts and drive current approaching 100 uA/um.","PeriodicalId":293780,"journal":{"name":"72nd Device Research Conference","volume":"12 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2014-06-22","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114943301","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 13
Graphene nanoribbon plasmonic waveguides: Fundamental limits and device implications 石墨烯纳米带等离子体波导:基本限制和器件意义
72nd Device Research Conference Pub Date : 2014-06-22 DOI: 10.1109/DRC.2014.6872319
S. Rakheja, P. Sengupta
{"title":"Graphene nanoribbon plasmonic waveguides: Fundamental limits and device implications","authors":"S. Rakheja, P. Sengupta","doi":"10.1109/DRC.2014.6872319","DOIUrl":"https://doi.org/10.1109/DRC.2014.6872319","url":null,"abstract":"The 2D carbon material graphene exhibits strong light-matter interaction over a very wide wavelength range from the far infrared to the ultraviolet [1]. The tunability of the density-of-states and Fermi energy in graphene along with its excellent transport properties provide a path for graphene photonic applications such as quantum optics, photo-voltaics, photo-detectors, and biological sensing [2]. In this paper, we propose exploiting collective electron-light oscillations or plasmons in patterned graphene nano-ribbons (GNRs) for low energy, high-speed on-chip interconnects that can potentially overcome the latency and power constraints of the current copper/low-K on-chip interconnects [3-4]. The contributions of this paper are threefold. First, compact models for evaluating the plasmon-damping rate in GNRs are introduced. The models account for plasmon-damping pathways through phonons (intrinsic and substrate), substrate charged impurities, and edge-states in ribbons. The compact models introduced in this paper are also applicable to other photonic applications of graphene beyond just on-chip interconnects. Secondly, compact models for evaluating the propagation speed and energy consumption of plasmonic waveguides based on their shot-noise limits are introduced. Finally, the fundamental limits and device implications of on-chip plasmonic waveguides are quantified. In particular, propagation speed and energy consumption are compared with copper/low-K on-chip interconnects at advanced technology nodes.","PeriodicalId":293780,"journal":{"name":"72nd Device Research Conference","volume":"4 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2014-06-22","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115070784","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 2
Exploring the design space for resistive nonvolatile memory crossbar arrays with mixed ionic-electronic-conduction (MIEC)-based Access Devices 探索基于混合离子-电子传导(MIEC)接入器件的电阻性非易失性存储器交叉棒阵列的设计空间
72nd Device Research Conference Pub Date : 2014-06-22 DOI: 10.1109/DRC.2014.6872386
P. Narayanan, G. Burr, R. Shenoy, S. Stephens, K. Virwani, A. Padilla, B. Kurdi, K. Gopalakrishnan
{"title":"Exploring the design space for resistive nonvolatile memory crossbar arrays with mixed ionic-electronic-conduction (MIEC)-based Access Devices","authors":"P. Narayanan, G. Burr, R. Shenoy, S. Stephens, K. Virwani, A. Padilla, B. Kurdi, K. Gopalakrishnan","doi":"10.1109/DRC.2014.6872386","DOIUrl":"https://doi.org/10.1109/DRC.2014.6872386","url":null,"abstract":"Using circuit-level SPICE simulations, we explore the design constraints on crossbar arrays composed of a nonvolatile memory (NVM) (+1R) and a highly nonlinear Access Device (AD) enabled by Cu-containing Mixed Ionic-Electronic Conduction (MIEC) materials [1-5]. Such ADs must maintain ultra-low leakage through a large number of unselected and partially selected 1AD+1R cells, while delivering high currents to the few cells selected for either read or write. We show that power consumption during write, not read margin, is the most stringent constraint for large 1AD+1R crossbar arrays, with NVM switching voltage VNVM and selector voltage margin Vm being much more critical than write current. We show that scaled MIEC devices (Vm ~ 1.54V [4]) can support 1Mb arrays for VNVM up to 1.2V. Stacking two MIEC devices enables VNVM ~ 2.4V. A 20% improvement in Vm can either enable a 4× increase in array size or counteract a 5× increase in interconnect line resistance.","PeriodicalId":293780,"journal":{"name":"72nd Device Research Conference","volume":"42 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2014-06-22","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"130636529","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 6
Improving contact resistance in MoS2 field effect transistors 改善MoS2场效应晶体管的接触电阻
72nd Device Research Conference Pub Date : 2014-06-22 DOI: 10.1109/DRC.2014.6872363
C. English, G. Shine, V. Dorgan, K. Saraswat, E. Pop
{"title":"Improving contact resistance in MoS2 field effect transistors","authors":"C. English, G. Shine, V. Dorgan, K. Saraswat, E. Pop","doi":"10.1109/DRC.2014.6872363","DOIUrl":"https://doi.org/10.1109/DRC.2014.6872363","url":null,"abstract":"MoS<sub>2</sub> is a material of interest for two-dimensional (2D) field effect transistors (FETs) [1-3], however contact resistance (R<sub>c</sub>) remains a key limiting factor. Here we present a systematic study of contact resistance to MoS<sub>2</sub> using various metals with different deposition conditions, compared to detailed simulations. We find that decreasing the metal deposition pressure improves the metal-MoS2 interface and brings R<sub>c</sub> for Au contacts to <;1 kΩ-μm, which is lower than previous reports with Ni, Sc, or Au [1,4]. Comparison to simulations suggest that while the contact resistivity is reasonably good (ρc ≈ 5·10<sup>-7</sup> Ω·cm<sup>2</sup>), the lateral access resistance limits Rc in MoS<sub>2</sub> FETs. This study is crucial for scalability of MoS<sub>2</sub> devices, also suggesting methods to further improve Rc.","PeriodicalId":293780,"journal":{"name":"72nd Device Research Conference","volume":"13 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2014-06-22","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128865012","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 13
Variability of graphene mobility and contacts: Surface effects, doping and strain 石墨烯迁移率和接触的可变性:表面效应、掺杂和应变
72nd Device Research Conference Pub Date : 2014-06-22 DOI: 10.1109/DRC.2014.6872366
E. Carrion, J. Wood, Ashkan Behman, Maryann C. Tung, J. Lyding, E. Pop
{"title":"Variability of graphene mobility and contacts: Surface effects, doping and strain","authors":"E. Carrion, J. Wood, Ashkan Behman, Maryann C. Tung, J. Lyding, E. Pop","doi":"10.1109/DRC.2014.6872366","DOIUrl":"https://doi.org/10.1109/DRC.2014.6872366","url":null,"abstract":"It is well known that devices based on chemical vapor deposited (CVD) graphene exhibit substantial variability of their electrical properties [1]. However, the sources of such variability and how they might be controlled remain poorly understood. Here, we methodically investigate variability of CVD graphene field-effect transistors (GFETs) transferred with three polymer scaffolds: PMMA, polycarbonate (PC), and a PC/PMMA bilayer (PC in contact with graphene). We find that the polymer/graphene mechanical interaction during transfer and the presence of surface residues induce changes in graphene roughness (up to ~0.2 nm), doping concentrations (up to ~2.5×1012 cm-2) and strain levels (up to ~0.2%) between the polymer scaffolds used. We uncover that a combination of smaller strain and doping from the PC/PMMA scaffolds ultimately yields the lowest variability of contact resistance (Rc) and mobility (μ).","PeriodicalId":293780,"journal":{"name":"72nd Device Research Conference","volume":"183 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2014-06-22","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123008152","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 3
Improvement of the dynamic on-resistance characteristics of GaN-on-Si power transistors with a sloped field-plate 斜场极板改善GaN-on-Si功率晶体管的动态导通电阻特性
72nd Device Research Conference Pub Date : 2014-06-22 DOI: 10.1109/DRC.2014.6872395
Zijian Li, R. Chu, D. Zehnder, S. Khalil, Mary Y. Chen, Xu Chen, K. Boutros
{"title":"Improvement of the dynamic on-resistance characteristics of GaN-on-Si power transistors with a sloped field-plate","authors":"Zijian Li, R. Chu, D. Zehnder, S. Khalil, Mary Y. Chen, Xu Chen, K. Boutros","doi":"10.1109/DRC.2014.6872395","DOIUrl":"https://doi.org/10.1109/DRC.2014.6872395","url":null,"abstract":"High Electron Mobility Transistors (HEMTs) based on GaN are attractive for high-speed and high-voltage applications. The performance advantages of the GaN HEMTs rely on the high breakdown field of the GaN material and the high electron mobility of the 2-dimesional electron gas (2DEG) in the AlGaN/GaN heterojunction [1, 2]. In order to take full advantage of the excellent material properties, the shape of the electric-field distribution in the GaN HEMTs must be carefully optimized to operate the device at its highest switching speed while handling a large voltage swing. Without proper field-shaping, a high electric-field can cause electron injection into traps, hence degrading the output current and on-resistance during switching operation. This phenomenon is often referred to as dynamic on-resistance (Ron dynamic) degradation, current collapse or DC-RF dispersion. As an effective approach of shaping the electric-field, the use of field-plates in GaN HEMTs has received extensive studies [3]. For microwave applications, a V-shaped gate with integrated sloped field-plate was used to control the electric-field with minimal added capacitance associated with the field-plate [5, 6]. For high-voltage applications, a multiple field-plates structure was used to scale up the operating voltage [2, 4]. In this paper, we report a sloped field-plate approach for high-voltage applications.","PeriodicalId":293780,"journal":{"name":"72nd Device Research Conference","volume":"30 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2014-06-22","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124126119","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 6
1/f hopping noise in molybdenum disulphide 二硫化钼的1/f跳频噪声
72nd Device Research Conference Pub Date : 2014-06-22 DOI: 10.1109/DRC.2014.6872296
Yuji Wang, Xinhang Luo, S. Poehler, M. Laskar, Lu Ma, Yiying Wu, S. Rajan, W. Lu
{"title":"1/f hopping noise in molybdenum disulphide","authors":"Yuji Wang, Xinhang Luo, S. Poehler, M. Laskar, Lu Ma, Yiying Wu, S. Rajan, W. Lu","doi":"10.1109/DRC.2014.6872296","DOIUrl":"https://doi.org/10.1109/DRC.2014.6872296","url":null,"abstract":"Molybdenum disulphide (MoS2), a layered metal dichalcogenide material, has attracted significant attention recently for potential application in next-generation electronics, light detection and emission, and chemical sensing due to its unique electrical and optical properties. The intrinsic 2-dimensional nature of carriers in MoS2 offers superior vertical scaling for device structure, leading to potentially low-cost, flexible, and transparent 2D electronic devices. However, the nature of charge transport still remains elusive, esp., a much lower mobility than theoretical limit set by phonon scattering. In this study, we focus on the study of low frequency noise (i.e., 1/f noise) of MoS2 devices working in the hopping regime since 1/f noise limits the performance of devices. There has been scarce 1/f noise study on monolayer or few-layer MoS2 based semiconductor devices. To the best of our knowledge, this is the first report focusing on 1/f hopping noise in MoS2. In this work, the low frequency noise of high mobility single crystal MoS2 is investigated by using transmission line measurements (TLM). At room temperature, the Hooge's parameter is ranged between 1.44×10-3 and 3.51×10-2, and it shows an inverse relationship with the field mobility. At low temperatures, the 1/f noise performance reveals the hopping is nearest neighbor hopping.","PeriodicalId":293780,"journal":{"name":"72nd Device Research Conference","volume":"40 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2014-06-22","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129201069","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
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