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Digest of Papers. 2004 Topical Meeting onSilicon Monolithic Integrated Circuits in RF Systems, 2004.最新文献

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Attenuation and dispersion modeling of coplanar waveguides on Si: free carriers contribution Si上共面波导的衰减和色散建模:自由载流子的贡献
Digest of Papers. 2004 Topical Meeting onSilicon Monolithic Integrated Circuits in RF Systems, 2004. Pub Date : 2004-09-08 DOI: 10.1109/SMIC.2004.1398217
E. Duraz, L. Duvillaret, P. Ferrari, J. Coutaz, J. Ghesquiers, É. Estebe
{"title":"Attenuation and dispersion modeling of coplanar waveguides on Si: free carriers contribution","authors":"E. Duraz, L. Duvillaret, P. Ferrari, J. Coutaz, J. Ghesquiers, É. Estebe","doi":"10.1109/SMIC.2004.1398217","DOIUrl":"https://doi.org/10.1109/SMIC.2004.1398217","url":null,"abstract":"We present an approach based on a physical model allowing the calculation of the effective permittivity of a substrate and on an electromagnetic model giving the propagation constant of a coplanar waveguide. Both models are analytical and no adjustable parameter is required to fit the measurements.","PeriodicalId":288561,"journal":{"name":"Digest of Papers. 2004 Topical Meeting onSilicon Monolithic Integrated Circuits in RF Systems, 2004.","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2004-09-08","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"116254298","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
Modeling of power supply parasitics for selecting on-wafer bypass capacitance in high-speed IC designs 高速集成电路设计中选择片上旁路电容的电源寄生特性建模
Digest of Papers. 2004 Topical Meeting onSilicon Monolithic Integrated Circuits in RF Systems, 2004. Pub Date : 2004-09-08 DOI: 10.1109/SMIC.2004.1398196
Qiurong He, M. Feng
{"title":"Modeling of power supply parasitics for selecting on-wafer bypass capacitance in high-speed IC designs","authors":"Qiurong He, M. Feng","doi":"10.1109/SMIC.2004.1398196","DOIUrl":"https://doi.org/10.1109/SMIC.2004.1398196","url":null,"abstract":"We have developed a model for power supply parasitics to select properly the on-wafer bypass capacitor values in high-speed IC designs. The model can allows the chip area to be minimized while maintaining circuit performance. The procedures to develop this model are described and are suitable for all device technologies. An InGaP/GaAs HBT transimpedance amplifier with 10-GHz bandwidth was designed and fabricated. The simulation with the model matches the measured results very well.","PeriodicalId":288561,"journal":{"name":"Digest of Papers. 2004 Topical Meeting onSilicon Monolithic Integrated Circuits in RF Systems, 2004.","volume":"8 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2004-09-08","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"130777585","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Design and optimization of silicon-based patch antennas using time-domain techniques 基于时域技术的硅基贴片天线设计与优化
Digest of Papers. 2004 Topical Meeting onSilicon Monolithic Integrated Circuits in RF Systems, 2004. Pub Date : 2004-09-08 DOI: 10.1109/SMIC.2004.1398237
G. DeJean, N. Bushyager, E. Dalton, M. Tentzeris, J. Papapolymerou
{"title":"Design and optimization of silicon-based patch antennas using time-domain techniques","authors":"G. DeJean, N. Bushyager, E. Dalton, M. Tentzeris, J. Papapolymerou","doi":"10.1109/SMIC.2004.1398237","DOIUrl":"https://doi.org/10.1109/SMIC.2004.1398237","url":null,"abstract":"The simulated results of a silicon-based microstrip patch antenna are presented. The antenna structure includes an additional layer of low permittivity material sandwiched between the antenna and the silicon substrate. The simulations are performed using two in-house computer codes that make use of the multi-resolution time domain (MRTD) and the finite difference time domain (FDTD) methods to solve for the electromagnetic fields. These techniques are used for the modeling and optimization of various silicon-based antennas.","PeriodicalId":288561,"journal":{"name":"Digest of Papers. 2004 Topical Meeting onSilicon Monolithic Integrated Circuits in RF Systems, 2004.","volume":"29 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2004-09-08","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"132252151","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
Measurement and modeling of coupling effects of CMOS on-chip coplanar inductors CMOS片上共面电感耦合效应的测量与建模
Digest of Papers. 2004 Topical Meeting onSilicon Monolithic Integrated Circuits in RF Systems, 2004. Pub Date : 2004-09-08 DOI: 10.1109/SMIC.2004.1398161
J. Mikkelsen, O. K. Jensen, T. Larsen
{"title":"Measurement and modeling of coupling effects of CMOS on-chip coplanar inductors","authors":"J. Mikkelsen, O. K. Jensen, T. Larsen","doi":"10.1109/SMIC.2004.1398161","DOIUrl":"https://doi.org/10.1109/SMIC.2004.1398161","url":null,"abstract":"The coupling effects between two adjacent coplanar spiral inductors are characterized for two cases, one where no guard structure is used and one where simple guard-rings are used. In addition, the effect of guard-rings is evaluated at different distances (190 /spl mu/m to 1090 /spl mu/m) between inductors. Measuring low levels of crosstalk is difficult, and in this context the effect of the test fixture itself is evaluated. Return current paths are found to have significant influence on low frequency results. In addition, based on laser cutting of test fixtures, a surrounding ground-ring is found to increase the crosstalk level. With the effect of ground-ring coupling removed, the use of simple guard-rings is shown to improve isolation by approximately 10-15 dB for closely spaced adjacent inductors. At larger distances, the gain from having a guard-ring reduces and eventually reduces to zero at a distance of 1000 /spl mu/m. For closely spaced devices, a doubling of distance is found to provide an additional 20 dB attenuation of crosstalk. An extended model, including mutual inductive coupling and direct capacitive coupling, is shown to provide an accurate fit.","PeriodicalId":288561,"journal":{"name":"Digest of Papers. 2004 Topical Meeting onSilicon Monolithic Integrated Circuits in RF Systems, 2004.","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2004-09-08","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129740052","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 19
RF MEMS resonator for CMOS back-end-of-line integration CMOS后端集成射频MEMS谐振器
Digest of Papers. 2004 Topical Meeting onSilicon Monolithic Integrated Circuits in RF Systems, 2004. Pub Date : 2004-09-08 DOI: 10.1109/SMIC.2004.1398203
S. Pacheco, P. Zurcher, S. Young, D. Weston, W. Dauksher
{"title":"RF MEMS resonator for CMOS back-end-of-line integration","authors":"S. Pacheco, P. Zurcher, S. Young, D. Weston, W. Dauksher","doi":"10.1109/SMIC.2004.1398203","DOIUrl":"https://doi.org/10.1109/SMIC.2004.1398203","url":null,"abstract":"CMOS back-end-of-line (BEOL) compatible MEMS resonators were fabricated via a low-temperature process flow. The exural-mode resonator beams are made of a bi-layer consisting of a thin TaN and thick SiON 1m. DC measurements of pull-down voltage indicate limitations to operating voltages due to electric field breakdown across the bottom electrode to resonator beam gap. The RF response of the resonators shows resonant frequencies in the 11.0-11.6 MHz range with Q values of 2200.","PeriodicalId":288561,"journal":{"name":"Digest of Papers. 2004 Topical Meeting onSilicon Monolithic Integrated Circuits in RF Systems, 2004.","volume":"21 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2004-09-08","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123887610","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 20
On the design and implementation of transmission lines in commercial SiGe HBT BiCMOS processes 商用SiGe HBT BiCMOS工艺中传输线的设计与实现
Digest of Papers. 2004 Topical Meeting onSilicon Monolithic Integrated Circuits in RF Systems, 2004. Pub Date : 2004-09-08 DOI: 10.1109/SMIC.2004.1398165
M. Morton, J. Andrews, J. Lee, J. Papapolymerou, J. Cressler, D. Cho, K. Hong, H. Shin, K. Park, S. Yi
{"title":"On the design and implementation of transmission lines in commercial SiGe HBT BiCMOS processes","authors":"M. Morton, J. Andrews, J. Lee, J. Papapolymerou, J. Cressler, D. Cho, K. Hong, H. Shin, K. Park, S. Yi","doi":"10.1109/SMIC.2004.1398165","DOIUrl":"https://doi.org/10.1109/SMIC.2004.1398165","url":null,"abstract":"This paper examines the feasibility of implementing transmission lines in a commercially-available SiGe HBT BiCMOS technology. Thin film microstrip transmission lines, using the top and bottom metalization layers (with a 3.24 /spl mu/m separation), from a 4 layer metal process SiGe HBT technology were designed, fabricated, and measured up to 110 GHz. These measured results were compared to full wave EM simulation results to gain additional design insight. Additional EM simulations were used to explore the effects of design rule changes which do not allow for large extents of ground plane without slotting.","PeriodicalId":288561,"journal":{"name":"Digest of Papers. 2004 Topical Meeting onSilicon Monolithic Integrated Circuits in RF Systems, 2004.","volume":"34 4 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2004-09-08","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"116493439","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 10
The resonance phase transistor cascode circuit 谐振相位晶体管级联电路
Digest of Papers. 2004 Topical Meeting onSilicon Monolithic Integrated Circuits in RF Systems, 2004. Pub Date : 2004-09-08 DOI: 10.1109/SMIC.2004.1398225
R. Wanner, P. Russer
{"title":"The resonance phase transistor cascode circuit","authors":"R. Wanner, P. Russer","doi":"10.1109/SMIC.2004.1398225","DOIUrl":"https://doi.org/10.1109/SMIC.2004.1398225","url":null,"abstract":"We propose a stable two-port amplifier concept using resonance phase transistors (RPT). While an RPT is a highly unstable device, the cascode of two RPT allows us to realize stable two-port amplifiers. The RPT cascode circuit shows an increase of the maximum stable gain G/sub MSG/ by 21 dB compared with an RPT in common emitter configuration. To minimize parasitics a very compact realization topology is given.","PeriodicalId":288561,"journal":{"name":"Digest of Papers. 2004 Topical Meeting onSilicon Monolithic Integrated Circuits in RF Systems, 2004.","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2004-09-08","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129239563","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
High-speed SiGe HBT technology and applications to mm-wave circuits 高速SiGe HBT技术及其在毫米波电路中的应用
Digest of Papers. 2004 Topical Meeting onSilicon Monolithic Integrated Circuits in RF Systems, 2004. Pub Date : 2004-09-08 DOI: 10.1109/SMIC.2004.1398167
T. Meister, Herbert Knapp, H. Schafer, K. Aufinger, R. Stengl, S. Boguth, R. Schreiter, M. Rest, W. Perndl, M. Wurzer, T. Bottner, J. Bock
{"title":"High-speed SiGe HBT technology and applications to mm-wave circuits","authors":"T. Meister, Herbert Knapp, H. Schafer, K. Aufinger, R. Stengl, S. Boguth, R. Schreiter, M. Rest, W. Perndl, M. Wurzer, T. Bottner, J. Bock","doi":"10.1109/SMIC.2004.1398167","DOIUrl":"https://doi.org/10.1109/SMIC.2004.1398167","url":null,"abstract":"A SiGe bipolar technology for high frequency applications is presented. A transit frequency of 206 GHz, a maximum oscillation frequency of 200 GHz and a ring oscillator gate delay time of 3.9 ps have been obtained. With a 110 GHz dynamic frequency divider, a 86 GHz static frequency divider, a 52 GHz dual modulus 256/257 prescaler and a 98 GHz VCO state of the art high frequency circuits could be realized in this SiGe technology.","PeriodicalId":288561,"journal":{"name":"Digest of Papers. 2004 Topical Meeting onSilicon Monolithic Integrated Circuits in RF Systems, 2004.","volume":"93 Pt A 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2004-09-08","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115786430","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 12
Boosting up performance of power SiGe HBTs using advanced layout concept 采用先进的布局理念提升功率SiGe hbt的性能
Digest of Papers. 2004 Topical Meeting onSilicon Monolithic Integrated Circuits in RF Systems, 2004. Pub Date : 2004-09-08 DOI: 10.1109/SMIC.2004.1398186
Guogong Wang, Chao Qin, N. Jiang, Z. Ma
{"title":"Boosting up performance of power SiGe HBTs using advanced layout concept","authors":"Guogong Wang, Chao Qin, N. Jiang, Z. Ma","doi":"10.1109/SMIC.2004.1398186","DOIUrl":"https://doi.org/10.1109/SMIC.2004.1398186","url":null,"abstract":"We report an advanced power device layout structure, namely heat transfer counterbalanced (HTCB) layout, for designing power SiGe HBTs. It is shown that this new power device structure can substantially reduce adverse thermal effects of power devices without using ballasting resistors. Significantly improved power performances have been achieved from SiGe power HBTs employing the new layout concept.","PeriodicalId":288561,"journal":{"name":"Digest of Papers. 2004 Topical Meeting onSilicon Monolithic Integrated Circuits in RF Systems, 2004.","volume":"75 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2004-09-08","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"133349883","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 9
Advances in SiGe HBT BiCMOS technology
Digest of Papers. 2004 Topical Meeting onSilicon Monolithic Integrated Circuits in RF Systems, 2004. Pub Date : 2004-09-08 DOI: 10.1109/SMIC.2004.1398152
A. Joseph, L. Lanzerotti, X. Liu, D. Sheridan, J. Johnson, Q. Liu, J. Dunn, J. Rieh, D. Harame
{"title":"Advances in SiGe HBT BiCMOS technology","authors":"A. Joseph, L. Lanzerotti, X. Liu, D. Sheridan, J. Johnson, Q. Liu, J. Dunn, J. Rieh, D. Harame","doi":"10.1109/SMIC.2004.1398152","DOIUrl":"https://doi.org/10.1109/SMIC.2004.1398152","url":null,"abstract":"Silicon-germanium (SiGe) heterojunction bipolar transistor (HBT) BiCMOS technology has established a strong foothold in the communications marketplace by offering a cost competitive solution for a myriad of products. SiGe BiCMOS technologies currently address various applications ranging from 0.9-77 GHz. At the heart of this success is the ease of integration of a high performance SiGe HBT with state-of-the-art CMOS and passive elements. We present the advances in SiGe BiCMOS technologies and an outlook of future challenges and opportunities.","PeriodicalId":288561,"journal":{"name":"Digest of Papers. 2004 Topical Meeting onSilicon Monolithic Integrated Circuits in RF Systems, 2004.","volume":"3 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2004-09-08","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"130508794","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 13
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