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Digest of Papers. 2004 Topical Meeting onSilicon Monolithic Integrated Circuits in RF Systems, 2004.最新文献

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Distributed amplifier design for low noise applications 低噪声应用的分布式放大器设计
Digest of Papers. 2004 Topical Meeting onSilicon Monolithic Integrated Circuits in RF Systems, 2004. Pub Date : 2004-09-08 DOI: 10.1109/SMIC.2004.1398230
Chinmaya Mishra, Chunyu Xin, E. Sánchez-Sinencio
{"title":"Distributed amplifier design for low noise applications","authors":"Chinmaya Mishra, Chunyu Xin, E. Sánchez-Sinencio","doi":"10.1109/SMIC.2004.1398230","DOIUrl":"https://doi.org/10.1109/SMIC.2004.1398230","url":null,"abstract":"Design considerations for a distributed amplifier as a low-noise front-end block are discussed. Noise analysis for the distributed amplifier with real transmission lines is shown in detail. The analysis for gain and noise figure is verified with simulation results from a 5-stage distributed amplifier implemented in a 0.18 /spl mu/m CMOS process.","PeriodicalId":288561,"journal":{"name":"Digest of Papers. 2004 Topical Meeting onSilicon Monolithic Integrated Circuits in RF Systems, 2004.","volume":"43 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2004-09-08","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"127128579","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Microstrip circuits on micromachined silicon 微加工硅上的微带电路
Digest of Papers. 2004 Topical Meeting onSilicon Monolithic Integrated Circuits in RF Systems, 2004. Pub Date : 2004-09-08 DOI: 10.1109/SMIC.2004.1398221
J. Hasch, H. Irion, A. Muller
{"title":"Microstrip circuits on micromachined silicon","authors":"J. Hasch, H. Irion, A. Muller","doi":"10.1109/SMIC.2004.1398221","DOIUrl":"https://doi.org/10.1109/SMIC.2004.1398221","url":null,"abstract":"Fully monolithic integration of a millimeter wave system on silicon requires low loss passive circuitry. Transmission line elements are needed to interconnect active devices and to realize distributed passive components. Using bulk micromachining and high resistivity silicon on insulator (SOI) wafers, well defined thin silicon membranes can be manufactured. This allows the use of microstrip circuits on silicon substrates at frequencies beyond 100 GHz. Full wave simulation results accompanied by measurements are presented for coplanar to microstrip transitions, microstrip lines and two simple test circuits.","PeriodicalId":288561,"journal":{"name":"Digest of Papers. 2004 Topical Meeting onSilicon Monolithic Integrated Circuits in RF Systems, 2004.","volume":"9 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2004-09-08","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129847561","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 2
Recent developments in porous silicon substrates for RF/microwave applications 用于射频/微波应用的多孔硅衬底的最新进展
Digest of Papers. 2004 Topical Meeting onSilicon Monolithic Integrated Circuits in RF Systems, 2004. Pub Date : 2004-09-08 DOI: 10.1109/SMIC.2004.1398191
R. F. Drayton
{"title":"Recent developments in porous silicon substrates for RF/microwave applications","authors":"R. F. Drayton","doi":"10.1109/SMIC.2004.1398191","DOIUrl":"https://doi.org/10.1109/SMIC.2004.1398191","url":null,"abstract":"Highly integrated system design is sought in silicon (Si) substrates due to the potential cost savings from volume manufacturing. For GHz applications, two research efforts in silicon have evolved, BiCMOS in SiGe and CMOS in Si, utilizing high and low resistivity silicon materials, respectively. In order to integrate active and passive designs in CMOS grade substrates with conductive and insulating features, multilayer and substrate modification methods have been investigated. The paper presents an overview of one substrate modification method, porous silicon, and recent electrical characterization data of GHz interconnect performance on dielectric capped and oxide converted forms of the material. In addition, highlights are presented of several RF circuit demonstrations on lumped element, active circuit, and packaging performance.","PeriodicalId":288561,"journal":{"name":"Digest of Papers. 2004 Topical Meeting onSilicon Monolithic Integrated Circuits in RF Systems, 2004.","volume":"21 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2004-09-08","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"125630313","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
Macromodeling for RF passives via circuit reduction of VPEC model 基于VPEC模型电路简化的射频无源宏观建模
Digest of Papers. 2004 Topical Meeting onSilicon Monolithic Integrated Circuits in RF Systems, 2004. Pub Date : 2004-09-08 DOI: 10.1109/SMIC.2004.1398202
Hao Yu, Lei He, S.X.-D. Tan
{"title":"Macromodeling for RF passives via circuit reduction of VPEC model","authors":"Hao Yu, Lei He, S.X.-D. Tan","doi":"10.1109/SMIC.2004.1398202","DOIUrl":"https://doi.org/10.1109/SMIC.2004.1398202","url":null,"abstract":"To accelerate the macromodel generation for RF passive components considering parasitics, we introduce the vector potential equivalent circuit (VPEC) to efficiently model the massively coupled passives, like transmission lines and inductors. It enables the passive sparsification of the inductance matrix by pruning the small off-diagonal elements with the desired accuracy. To further reduce the model order, we apply a hierarchical s-domain circuit reduction to generate a reduced driving-point impedance function, and then use Brune's one-port network synthesis to realize the impedance function by a low-order RLCM ladder circuit as the compact macromodel. We have applied this method to generate the macromodel for the spiral inductor during the design of a cross-coupled LC oscillator. The synthesized lower-order macromodel is accurate up to 10 GHz with 50X speedup in the time-domain simulation.","PeriodicalId":288561,"journal":{"name":"Digest of Papers. 2004 Topical Meeting onSilicon Monolithic Integrated Circuits in RF Systems, 2004.","volume":"15 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2004-09-08","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"127754904","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 2
Wafer-level chip-scale packaging for low-end RF products 用于低端射频产品的晶圆级芯片级封装
Digest of Papers. 2004 Topical Meeting onSilicon Monolithic Integrated Circuits in RF Systems, 2004. Pub Date : 2004-09-08 DOI: 10.1109/SMIC.2004.1398162
M. Bartek, G. Zilber, D. Teomin, A. Polyakov, S. Sinaga, P. Mendes, J. Burghartz
{"title":"Wafer-level chip-scale packaging for low-end RF products","authors":"M. Bartek, G. Zilber, D. Teomin, A. Polyakov, S. Sinaga, P. Mendes, J. Burghartz","doi":"10.1109/SMIC.2004.1398162","DOIUrl":"https://doi.org/10.1109/SMIC.2004.1398162","url":null,"abstract":"The paper gives a short overview of wafer-level chip-scale packaging technology and analyses its added value in the packaging of RF ICs. Particularly, the possibilities of substrate crosstalk suppression by substrate thinning and trenching together with embedding of RF passives (inductors, antennas) are addressed. The Shellcase-type wafer-level packaging solution is used as a study case presenting its fabrication aspects and its potential for RF IC packaging.","PeriodicalId":288561,"journal":{"name":"Digest of Papers. 2004 Topical Meeting onSilicon Monolithic Integrated Circuits in RF Systems, 2004.","volume":"19 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2004-09-08","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128198786","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 4
High mobility SiGe/Si n-type structures and field effect transistors on sapphire substrates 蓝宝石衬底上的高迁移率SiGe/Si n型结构和场效应晶体管
Digest of Papers. 2004 Topical Meeting onSilicon Monolithic Integrated Circuits in RF Systems, 2004. Pub Date : 2004-03-10 DOI: 10.1109/SMIC.2004.1398179
S. Alterovitz, G. Ponchak, C. Mueller, E. Croke
{"title":"High mobility SiGe/Si n-type structures and field effect transistors on sapphire substrates","authors":"S. Alterovitz, G. Ponchak, C. Mueller, E. Croke","doi":"10.1109/SMIC.2004.1398179","DOIUrl":"https://doi.org/10.1109/SMIC.2004.1398179","url":null,"abstract":"SiGe/Si n-type modulation doped field effect transistors (MODFETs) fabricated on sapphire substrates are characterized at microwave frequencies for the first time. The highest measured room temperature electron mobility is 1380 cm/sup 2//V-sec at a carrier density of 1.8/spl times/10/sup 12/ cm/sup -2/ for a MODFET structure. At room temperature, a two finger, 2/spl times/200 micron gate n-MODFET has a peak transconductance of 37 mS/mm at a drain-to-source voltage of 2.5 V and an f/sub max/ of 2.45 GHz. Microwave performance of the transistor improved with decreasing temperatures, with an f/sub max/= 5.25 GHz at 100 K.","PeriodicalId":288561,"journal":{"name":"Digest of Papers. 2004 Topical Meeting onSilicon Monolithic Integrated Circuits in RF Systems, 2004.","volume":"84 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2004-03-10","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123600700","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
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