{"title":"Recent developments in porous silicon substrates for RF/microwave applications","authors":"R. F. Drayton","doi":"10.1109/SMIC.2004.1398191","DOIUrl":null,"url":null,"abstract":"Highly integrated system design is sought in silicon (Si) substrates due to the potential cost savings from volume manufacturing. For GHz applications, two research efforts in silicon have evolved, BiCMOS in SiGe and CMOS in Si, utilizing high and low resistivity silicon materials, respectively. In order to integrate active and passive designs in CMOS grade substrates with conductive and insulating features, multilayer and substrate modification methods have been investigated. The paper presents an overview of one substrate modification method, porous silicon, and recent electrical characterization data of GHz interconnect performance on dielectric capped and oxide converted forms of the material. In addition, highlights are presented of several RF circuit demonstrations on lumped element, active circuit, and packaging performance.","PeriodicalId":288561,"journal":{"name":"Digest of Papers. 2004 Topical Meeting onSilicon Monolithic Integrated Circuits in RF Systems, 2004.","volume":"21 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2004-09-08","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"Digest of Papers. 2004 Topical Meeting onSilicon Monolithic Integrated Circuits in RF Systems, 2004.","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/SMIC.2004.1398191","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 1
Abstract
Highly integrated system design is sought in silicon (Si) substrates due to the potential cost savings from volume manufacturing. For GHz applications, two research efforts in silicon have evolved, BiCMOS in SiGe and CMOS in Si, utilizing high and low resistivity silicon materials, respectively. In order to integrate active and passive designs in CMOS grade substrates with conductive and insulating features, multilayer and substrate modification methods have been investigated. The paper presents an overview of one substrate modification method, porous silicon, and recent electrical characterization data of GHz interconnect performance on dielectric capped and oxide converted forms of the material. In addition, highlights are presented of several RF circuit demonstrations on lumped element, active circuit, and packaging performance.