发布求助
文献互助 智能选刊 最新文献

Digest of Papers. 2004 Topical Meeting onSilicon Monolithic Integrated Circuits in RF Systems, 2004.最新文献

筛选
英文 中文
An 8.4-12.0 GHz down-conversion mixer implemented in SiGe HBT technology 采用SiGe HBT技术实现的8.4-12.0 GHz下变频混频器
Digest of Papers. 2004 Topical Meeting onSilicon Monolithic Integrated Circuits in RF Systems, 2004. Pub Date : 2004-09-08 DOI: 10.1109/SMIC.2004.1398155
J. Comeau, J. Cressler, J. Lee, A. Joseph
{"title":"An 8.4-12.0 GHz down-conversion mixer implemented in SiGe HBT technology","authors":"J. Comeau, J. Cressler, J. Lee, A. Joseph","doi":"10.1109/SMIC.2004.1398155","DOIUrl":"https://doi.org/10.1109/SMIC.2004.1398155","url":null,"abstract":"An 8.4-12.0 GHz down-conversion mixer, implemented in SiGe HBT technology, is presented. The mixer achieves a conversion gain of 12.6 dB, a return loss greater than 14 dB, and a noise figure less than 12.4 dB over the band of operation. The mixer also achieves an input-referred third order intercept point of -0.45 dBm, and an output 1 dB compression point of 2 dBm at an IF of 1.25 GHz, and dissipates only 12 mW for the mixer core, off of a 3.0 V supply. This work also proposes a new mixer figure-of-merit to facilitate a more comprehensive comparison of mixer performance with varying technologies and architectures.","PeriodicalId":288561,"journal":{"name":"Digest of Papers. 2004 Topical Meeting onSilicon Monolithic Integrated Circuits in RF Systems, 2004.","volume":"19 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2004-09-08","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122265982","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 5
Extracting of substrate network resistances in RF CMOS transistors 射频CMOS晶体管衬底网络电阻的提取
Digest of Papers. 2004 Topical Meeting onSilicon Monolithic Integrated Circuits in RF Systems, 2004. Pub Date : 2004-09-08 DOI: 10.1109/SMIC.2004.1398207
M. M. Tabrizi, E. Fathi, M. Fathipour, N. Masoumi
{"title":"Extracting of substrate network resistances in RF CMOS transistors","authors":"M. M. Tabrizi, E. Fathi, M. Fathipour, N. Masoumi","doi":"10.1109/SMIC.2004.1398207","DOIUrl":"https://doi.org/10.1109/SMIC.2004.1398207","url":null,"abstract":"Substrate network resistances are analyzed and extracted for multi-finger MOS transistors used in RF applications. The commonly used model for MOS transistors in RF applications mainly consists of a substrate resistance network having three resistors. A typical horse-shoe CMOS transistor is laid out and all substrate resistances are extracted from I-V characteristics. Device and process simulation results for 0.25 /spl mu/m CMOS technology show that the horse-shoe structure decreases the parasitic substrate resistance by 27%. Additionally, we show that the results obtained by the traditional approximation method deviated about 31% from the exact results. Furthermore, with the proposed method, the substrate resistance values can be exactly extracted.","PeriodicalId":288561,"journal":{"name":"Digest of Papers. 2004 Topical Meeting onSilicon Monolithic Integrated Circuits in RF Systems, 2004.","volume":"63 2 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2004-09-08","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129980455","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 5
Low-frequency noise of 90 nm nFETs: hot-carrier degradation and deuterium effect 90nm nfet的低频噪声:热载流子降解和氘效应
Digest of Papers. 2004 Topical Meeting onSilicon Monolithic Integrated Circuits in RF Systems, 2004. Pub Date : 2004-09-08 DOI: 10.1109/SMIC.2004.1398184
M. Erturk, R. Anna, T. Xia, W. Clark, K.M. Nexvton, J. Pekarik, C. Lamothe, M.R. Lacroix
{"title":"Low-frequency noise of 90 nm nFETs: hot-carrier degradation and deuterium effect","authors":"M. Erturk, R. Anna, T. Xia, W. Clark, K.M. Nexvton, J. Pekarik, C. Lamothe, M.R. Lacroix","doi":"10.1109/SMIC.2004.1398184","DOIUrl":"https://doi.org/10.1109/SMIC.2004.1398184","url":null,"abstract":"We show that the low-frequency noise (LFN) of 90 nm nFETs can increase considerably due to hot-carrier stress. Measurements reveal noise degradation for both linear and saturation regions of operation. The use of deuterium processing retards the noise degradation and improves the noise lifetime by more than 20/spl times/.","PeriodicalId":288561,"journal":{"name":"Digest of Papers. 2004 Topical Meeting onSilicon Monolithic Integrated Circuits in RF Systems, 2004.","volume":"92 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2004-09-08","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"133958740","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
A small-signal, RF simulation study of multiple-gate and silicon-on-insulator MOSFET devices 多栅极和绝缘体上硅MOSFET器件的小信号、射频仿真研究
Digest of Papers. 2004 Topical Meeting onSilicon Monolithic Integrated Circuits in RF Systems, 2004. Pub Date : 2004-09-08 DOI: 10.1109/SMIC.2004.1398227
A. Breed, K. Roenker
{"title":"A small-signal, RF simulation study of multiple-gate and silicon-on-insulator MOSFET devices","authors":"A. Breed, K. Roenker","doi":"10.1109/SMIC.2004.1398227","DOIUrl":"https://doi.org/10.1109/SMIC.2004.1398227","url":null,"abstract":"Because of their superior scaling characteristics and reduced short channel effects, multi-gate MOSFETs are being considered for replacing conventional planar silicon MOSFETs in digital applications. At the same time, improvements in the high frequency capabilities of conventional MOSFETs have made them increasingly attractive for RF applications. The paper examines the performance capabilities of multi-gate MOSFETs in the RF regime using a simulation study of their small-signal behavior. Three dimensional numerical simulations have been performed to investigate the high frequency performance of two of the most promising multigate devices, i.e. the finFET and the trigate transistor. The trigate transistor has been found to exhibit a higher transconductance, small signal current gain and unilateral power gain as compared to the finFET, as well as a higher cutoff frequency, f/sub T/, and maximum frequency of oscillation, f/sub MAX/. Peak f/sub T/ of 42 and 51 GHz and peak f/sub MAX/ of 183 and 228 GHz were obtained for the finFET and trigate transistors, respectively, for a gate length of 50 nm.","PeriodicalId":288561,"journal":{"name":"Digest of Papers. 2004 Topical Meeting onSilicon Monolithic Integrated Circuits in RF Systems, 2004.","volume":"17 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2004-09-08","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123098267","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 10
A compact nonlinear model for coplanar waveguides on silicon substrates 硅衬底共面波导的紧凑非线性模型
Digest of Papers. 2004 Topical Meeting onSilicon Monolithic Integrated Circuits in RF Systems, 2004. Pub Date : 2004-09-08 DOI: 10.1109/SMIC.2004.1398200
Z. Sun, P. Fay
{"title":"A compact nonlinear model for coplanar waveguides on silicon substrates","authors":"Z. Sun, P. Fay","doi":"10.1109/SMIC.2004.1398200","DOIUrl":"https://doi.org/10.1109/SMIC.2004.1398200","url":null,"abstract":"A wideband nonlinear equivalent circuit model for quasi-TEM coplanar waveguide (CPW) transmission lines fabricated on low-resistivity Si substrates is proposed and verified experimentally. The model includes nonlinear bias-dependent junction conductances and capacitances, which enable the model to scale with substrate doping concentration and transmission line geometry. Numerical calculation of the CPW capacitance, based on 2D solutions of Poisson's equation, as well as experimental investigations of the dependence of model parameters on substrate doping type (both n- and p-type) and doping concentration have been performed. Measurements of typical devices show excellent agreement between the model prediction and measured transmission line S-parameters from 100 MHz to 10 GHz. Analysis of the model indicates that a full back-to-back metal-semiconductor junction contact model is required for CPWs on n-type substrates, while the higher Schottky barrier height of typical metal contacts to p-type Si permits a simpler one-sided junction model for CPWs on p-type substrates.","PeriodicalId":288561,"journal":{"name":"Digest of Papers. 2004 Topical Meeting onSilicon Monolithic Integrated Circuits in RF Systems, 2004.","volume":"52 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2004-09-08","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"130993453","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
High frequency capacitive micromechanical resonators with reduced motional resistance using the HARPSS technology 高频电容微机械谐振器，采用HARPSS技术降低运动电阻
Digest of Papers. 2004 Topical Meeting onSilicon Monolithic Integrated Circuits in RF Systems, 2004. Pub Date : 2004-09-08 DOI: 10.1109/SMIC.2004.1398189
S. Pourkamali, Farrokh Ayazi
{"title":"High frequency capacitive micromechanical resonators with reduced motional resistance using the HARPSS technology","authors":"S. Pourkamali, Farrokh Ayazi","doi":"10.1109/SMIC.2004.1398189","DOIUrl":"https://doi.org/10.1109/SMIC.2004.1398189","url":null,"abstract":"The paper reports on the implementation and characterization of thick bulk mode VHF capacitive disk resonators with reduced motional resistance. Single crystal silicon (SCS) side-supported disk resonators with thickness of 18 /spl mu/m and 10 /spl mu/m and capacitive gaps of 160 nm and 75 nm, respectively (gap aspect-ratio>130), are fabricated on silicon-on-insulator substrates using a 3-mask HARPSS-on-SOI process. Over 20/spl times/ lower motional resistance and larger signal-to-noise ratio compared to the previous thin VHF SCS resonators is demonstrated, resulting from the new resonator design with increased number of electrodes and larger device thickness. Quality factors in the order of 30,000 to 50,000 at resonant frequencies of 150-230 MHz are demonstrated for the thick disk resonators. The measured data is in excellent agreement with the theoretical values.","PeriodicalId":288561,"journal":{"name":"Digest of Papers. 2004 Topical Meeting onSilicon Monolithic Integrated Circuits in RF Systems, 2004.","volume":"69 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2004-09-08","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"133559990","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 32
Microscopic RF noise simulation and noise source modeling in 50 nm gate length CMOS 50nm栅长CMOS的微观射频噪声仿真及噪声源建模
Digest of Papers. 2004 Topical Meeting onSilicon Monolithic Integrated Circuits in RF Systems, 2004. Pub Date : 2004-09-08 DOI: 10.1109/SMIC.2004.1398183
G. Niu, Yan Cui, S. S. Taylor
{"title":"Microscopic RF noise simulation and noise source modeling in 50 nm gate length CMOS","authors":"G. Niu, Yan Cui, S. S. Taylor","doi":"10.1109/SMIC.2004.1398183","DOIUrl":"https://doi.org/10.1109/SMIC.2004.1398183","url":null,"abstract":"The RF noise of 50 nm gate length CMOS is simulated using hydrodynamic noise simulation. Intrinsic noise sources for the Y- and H-representations are examined and models of intrinsic noise sources are proposed.","PeriodicalId":288561,"journal":{"name":"Digest of Papers. 2004 Topical Meeting onSilicon Monolithic Integrated Circuits in RF Systems, 2004.","volume":"5 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2004-09-08","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114517576","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
Analysis and circuit modeling of on-chip transformers 片上变压器的分析与电路建模
Digest of Papers. 2004 Topical Meeting onSilicon Monolithic Integrated Circuits in RF Systems, 2004. Pub Date : 2004-09-08 DOI: 10.1109/SMIC.2004.1398194
G. Klemens, M. Bhagat, D. Jessie, N. Fredenick
{"title":"Analysis and circuit modeling of on-chip transformers","authors":"G. Klemens, M. Bhagat, D. Jessie, N. Fredenick","doi":"10.1109/SMIC.2004.1398194","DOIUrl":"https://doi.org/10.1109/SMIC.2004.1398194","url":null,"abstract":"We present circuit topologies and fitting methods that accurately represent on-chip transformers over a frequency sufficient for cellular and PCS circuit analysis. Starting with an S-parameter matrix, obtained through measurement or electromagnetic (EM) simulation, we find an equivalent lumped-element circuit model with minimum fitting error. Consideration is made for the passivity of the model. Examples are shown that include measurements, EM simulation, and equivalent circuit models.","PeriodicalId":288561,"journal":{"name":"Digest of Papers. 2004 Topical Meeting onSilicon Monolithic Integrated Circuits in RF Systems, 2004.","volume":"219 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2004-09-08","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115836901","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 11
A novel design of an asymmetric D-latch 一种不对称d型锁存器的新设计
Digest of Papers. 2004 Topical Meeting onSilicon Monolithic Integrated Circuits in RF Systems, 2004. Pub Date : 2004-09-08 DOI: 10.1109/SMIC.2004.1398218
S. Trotta, J. Sundermeyer, N. Weber, J. Saurer
{"title":"A novel design of an asymmetric D-latch","authors":"S. Trotta, J. Sundermeyer, N. Weber, J. Saurer","doi":"10.1109/SMIC.2004.1398218","DOIUrl":"https://doi.org/10.1109/SMIC.2004.1398218","url":null,"abstract":"The paper discusses design aspects of high speed asymmetric D-latches. It is shown how an asymmetric input clock signal can be used favorably to improve latch performance. Moreover. a completely asymmetric D-flipflop, which shows a static behavior at low frequency and a superdynamic behavior at very high speed, is presented.","PeriodicalId":288561,"journal":{"name":"Digest of Papers. 2004 Topical Meeting onSilicon Monolithic Integrated Circuits in RF Systems, 2004.","volume":"12 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2004-09-08","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"132340213","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 3
Efficient design methodology of polymer based RF MEMS switches 基于聚合物的射频MEMS开关的高效设计方法
Digest of Papers. 2004 Topical Meeting onSilicon Monolithic Integrated Circuits in RF Systems, 2004. Pub Date : 2004-09-08 DOI: 10.1109/SMIC.2004.1398228
B. Ducarouge, D. Dubuc, S. Mellé, L. Bary, P. Pons, R. Plana
{"title":"Efficient design methodology of polymer based RF MEMS switches","authors":"B. Ducarouge, D. Dubuc, S. Mellé, L. Bary, P. Pons, R. Plana","doi":"10.1109/SMIC.2004.1398228","DOIUrl":"https://doi.org/10.1109/SMIC.2004.1398228","url":null,"abstract":"We present a capacitive shunt switch topology related to a simple, fast and efficient design methodology. The proposed switch has been realized and measurements exhibit isolation better than -23 dB and losses less than 0.25 dB at 24 GHz for a pull down voltage of 22 V. In order to design and optimize more complex passive circuits, we have defined a scalable equivalent electrical model from electromagnetic simulations that allows a very fast optimization of the microwave performance. The RF power capability related to the electromigration effect of this structure has been also investigated and a maximum power handling of 10 W has been demonstrated.","PeriodicalId":288561,"journal":{"name":"Digest of Papers. 2004 Topical Meeting onSilicon Monolithic Integrated Circuits in RF Systems, 2004.","volume":"35 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2004-09-08","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"132093482","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 11
首页 上一页 下一页 尾页
0
×
引用
GB/T 7714-2015
复制
MLA
复制
APA
复制
导出至
BibTeX EndNote RefMan NoteFirst NoteExpress
×
提示
您的信息不完整，为了账户安全，请先补充。
现在去补充
×
提示
您因"违规操作"
具体请查看互助需知
我知道了
×
提示
现在去查看 取消
×
提示
确定
请完成安全验证×
相关产品
×
本文献相关产品
联系我们：info@booksci.cn Book学术提供免费学术资源搜索服务，方便国内外学者检索中英文文献。致力于提供最便捷和优质的服务体验。 Copyright © 2023 布克学术 All rights reserved.
京ICP备2023020795号-1
ghs 京公网安备 11010802042870号
Book学术文献互助
Book学术文献互助群
群 号：604180095
Book学术官方微信