Y. Du, Y. Hu, H. Wang, X. Yao, Y.C. Zhao, D. Sun, F. M. Li
{"title":"Vacuum ultraviolet-induced and enhanced oxidation of Si and GaAs in N/sub 2/O","authors":"Y. Du, Y. Hu, H. Wang, X. Yao, Y.C. Zhao, D. Sun, F. M. Li","doi":"10.1109/ICSICT.1995.503387","DOIUrl":"https://doi.org/10.1109/ICSICT.1995.503387","url":null,"abstract":"We present a low temperature photo (VUV) enhanced oxidation technique to grow ultra thin dielectric films on Si and GaAs in nitrous oxide (N/sub 2/O) ambient at low substrate temperature (<500 /spl deg/C). There is a sharp increase in the oxidation rate of Si and GaAs under VUV irradiation. Auger electron spectroscopy and X-ray photoelectron spectroscopy are used to monitor film composition. The subcutaneous oxidation due to VUV radiation (/spl lambda/=110-180 nm) relies on a non-thermal mechanism of light enhancement and reactivity of oxidizing species.","PeriodicalId":286176,"journal":{"name":"Proceedings of 4th International Conference on Solid-State and IC Technology","volume":"110 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1995-10-24","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123694330","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
M. Ker, Chung-Yu Wu, Tao Cheng, Hun-Hsien Chang, M.J.-N. Wu, Talee Yu
{"title":"Efficient layout style of CMOS output buffer to improve driving capability of low-voltage submicron CMOS IC's","authors":"M. Ker, Chung-Yu Wu, Tao Cheng, Hun-Hsien Chang, M.J.-N. Wu, Talee Yu","doi":"10.1109/ICSICT.1995.499780","DOIUrl":"https://doi.org/10.1109/ICSICT.1995.499780","url":null,"abstract":"A novel square-type layout style is proposed to efficiently implement CMOS output buffer with larger W/L ratio into a smaller silicon layout area than that of conventional finger-type layout style. Using this proposed layout style, the driving capability of CMOS output buffer in low-voltage submicron CMOS IC's can be effectively improved without increasing the layout area.","PeriodicalId":286176,"journal":{"name":"Proceedings of 4th International Conference on Solid-State and IC Technology","volume":"2 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1995-10-24","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"125289608","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
T. Simlinger, R. Deutschmann, C. Fischer, H. Kosina, S. Selberherr
{"title":"Two-dimensional hydrodynamic simulation of High Electron Mobility Transistors using a block iterative scheme in combination with full Newton method","authors":"T. Simlinger, R. Deutschmann, C. Fischer, H. Kosina, S. Selberherr","doi":"10.1109/ICSICT.1995.503360","DOIUrl":"https://doi.org/10.1109/ICSICT.1995.503360","url":null,"abstract":"Pseudomorphic submicron High Electron Mobility Transistors (HEMT) have conquered a broad field of application because of their high-frequency performance. The DC characteristics of a 0.23 /spl mu/m gate length transistor have been calculated by our recently developed device simulator using a hydrodynamic model (HD) which accounts for carrier heating effects in the short channel region. A block iterative scheme combined with a full Newton method is applied to improve the convergence performance, robustness and stability of the HD model. Furthermore, an extended Scharfetter-Gummel scheme was used to account for the spatial variation of material properties such as band edge energy and effective density of states.","PeriodicalId":286176,"journal":{"name":"Proceedings of 4th International Conference on Solid-State and IC Technology","volume":"8 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1995-10-24","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"125293472","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"BMHMT: device & model","authors":"Ping-Hau Chen, Zhijian Li, Litian Liu","doi":"10.1109/ICSICT.1995.503560","DOIUrl":"https://doi.org/10.1109/ICSICT.1995.503560","url":null,"abstract":"A kind of Bi-MOS Hybrid-Mode transistor (BMHMT) and its analytical model are proposed. Both experiment and simulation confirm our conclusions.","PeriodicalId":286176,"journal":{"name":"Proceedings of 4th International Conference on Solid-State and IC Technology","volume":"54 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1995-10-24","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122613517","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Control on the characteristics of the static induction transistor (SIT)","authors":"S.Y. Li, R.X. Liu, S. Liu","doi":"10.1109/ICSICT.1995.500244","DOIUrl":"https://doi.org/10.1109/ICSICT.1995.500244","url":null,"abstract":"The SIT's characteristics, including triode-like, pentode-like and mixed triode-/pentode-like, are dependent strongly on device structure. The channel length l/sub c/, the channel thickness d/sub c/, the ratio of l/sub c//d/sub c/ and the channel doping concentration Nd are all essential parameters in determining the characteristics of the SIT. It is observed the channel factor is dominant in controlling the characteristics.","PeriodicalId":286176,"journal":{"name":"Proceedings of 4th International Conference on Solid-State and IC Technology","volume":"9 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1995-10-24","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128556473","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Self-planarized deep trench process for self-aligned nitride bipolar device isolation","authors":"T. Lo, H.C. Huang, J.S. Zhang","doi":"10.1109/ICSICT.1995.500074","DOIUrl":"https://doi.org/10.1109/ICSICT.1995.500074","url":null,"abstract":"The self-planarization of deep trench with 2 micron thick field oxidation has been developed for self-aligned nitride bipolar integrated circuit fabrication. Trenches with geometry of 2 /spl mu/m wide by 8 /spl mu/m deep were achieved by anisotropic etching for isolating global buried collectors. They were then filled and planarized simply by a local oxidation of silicon (LOCOS) without polysilicon re-filling or etching back, while maintained a collector-to-collector leakage of 5 /spl mu/a at 15 V. As proof-of-technology, arrays of trench-isolated bipolar transistors with cut-off frequency of 14 GHz were gold-metallized without extra planarization of the trench.","PeriodicalId":286176,"journal":{"name":"Proceedings of 4th International Conference on Solid-State and IC Technology","volume":"29 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1995-10-24","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124788110","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Zong-Guang Yu, G. Chang, H Zhao, Yifeng Zhou, Xiao Hua, Juyan Xu, L. Meng, Tongli Wei
{"title":"Development of a 11/12 bit compatible high-voltage D/A converter with output to 40 V","authors":"Zong-Guang Yu, G. Chang, H Zhao, Yifeng Zhou, Xiao Hua, Juyan Xu, L. Meng, Tongli Wei","doi":"10.1109/ICSICT.1995.499650","DOIUrl":"https://doi.org/10.1109/ICSICT.1995.499650","url":null,"abstract":"A 11/12 bit compatible high-voltage D/A converter with output range within 0-40 V is presented. It can endure 50 V high-voltage, consists of input protection circuit, current limit circuits, switch array, and R-2R network. A high voltage device structure has been used. The die size is 5.024/spl times/3.898 mm. The converter was fabricated by the p-n junction isolation bipolar process. The result of measurement has shown that it can operate continuously under 50 V voltage. The total conversion time is less than 4.0 /spl mu/s.","PeriodicalId":286176,"journal":{"name":"Proceedings of 4th International Conference on Solid-State and IC Technology","volume":"28 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1995-10-24","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"130550703","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"An efficient implementation of motion estimation algorithms","authors":"Q. Shu, Hongyi Chen","doi":"10.1109/ICSICT.1995.503394","DOIUrl":"https://doi.org/10.1109/ICSICT.1995.503394","url":null,"abstract":"In this paper, a novel low latency and high throughput programmable motion estimator architecture is proposed, which can efficiently implement both fall search and hierarchical search algorithms in motion estimation in VLSI.","PeriodicalId":286176,"journal":{"name":"Proceedings of 4th International Conference on Solid-State and IC Technology","volume":"3 3 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1995-10-24","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123618018","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"The linearization of MOS source-coupled pair","authors":"Shicai Qin, Mu-Zhon Shao, Xiangluan Jia","doi":"10.1109/ICSICT.1995.499645","DOIUrl":"https://doi.org/10.1109/ICSICT.1995.499645","url":null,"abstract":"This paper presents a new linearization approach for a MOS source-coupled pair that utilizes a current I/sub ss/=a+bV/sup 2/ produced by an asymmetrical source-coupled pair as the tail current to cancel out its inherent nonlinearity. Simulation results show that under /spl plusmn/5 V bias voltage and over /spl plusmn/3 V input signal swings, the maximum full scale nonlinear error is /spl plusmn/0.68%.","PeriodicalId":286176,"journal":{"name":"Proceedings of 4th International Conference on Solid-State and IC Technology","volume":"52 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1995-10-24","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"120893579","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Hua Fang, Bingzong Li, W. Yu, Wei-ning Huang, Kai Shao, Wei-Jun Wu, Z. Gu, G. Jiang
{"title":"Study on solid state reaction of TiN/Co/Ti multi-layer with amorphous silicon","authors":"Hua Fang, Bingzong Li, W. Yu, Wei-ning Huang, Kai Shao, Wei-Jun Wu, Z. Gu, G. Jiang","doi":"10.1109/ICSICT.1995.499266","DOIUrl":"https://doi.org/10.1109/ICSICT.1995.499266","url":null,"abstract":"Solid state reaction of TiN/Co/Ti multilayer with PECVD amorphous silicon has been studied. Experimental results show that uniform polycrystalline CoSi/sub 2/ with good thermal stability and smooth surface can be obtained after thermal annealing.","PeriodicalId":286176,"journal":{"name":"Proceedings of 4th International Conference on Solid-State and IC Technology","volume":"41 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1995-10-24","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"121174685","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}