Self-planarized deep trench process for self-aligned nitride bipolar device isolation

T. Lo, H.C. Huang, J.S. Zhang
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引用次数: 0

Abstract

The self-planarization of deep trench with 2 micron thick field oxidation has been developed for self-aligned nitride bipolar integrated circuit fabrication. Trenches with geometry of 2 /spl mu/m wide by 8 /spl mu/m deep were achieved by anisotropic etching for isolating global buried collectors. They were then filled and planarized simply by a local oxidation of silicon (LOCOS) without polysilicon re-filling or etching back, while maintained a collector-to-collector leakage of 5 /spl mu/a at 15 V. As proof-of-technology, arrays of trench-isolated bipolar transistors with cut-off frequency of 14 GHz were gold-metallized without extra planarization of the trench.
自平面化深沟槽工艺用于自对准氮化物双极器件隔离
研究了自对准氮化双极集成电路中2微米厚氧化深沟槽的自平面化方法。采用各向异性刻蚀法隔离全球埋藏集热器,获得了2 /spl mu/m宽、8 /spl mu/m深的沟槽。然后简单地通过硅的局部氧化(LOCOS)填充和平面化,而不需要多晶硅重新填充或蚀刻回,同时在15 V下保持集电极到集电极的5 /spl mu/a泄漏。作为技术证明,截止频率为14 GHz的沟槽隔离双极晶体管阵列被镀金,而沟槽没有额外的平坦化。
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