一种高效的CMOS输出缓冲器布局方式，提高了低压亚微米CMOS集成电路的驱动性能

Proceedings of 4th International Conference on Solid-State and IC Technology Pub Date : 1995-10-24 DOI:10.1109/ICSICT.1995.499780

M. Ker, Chung-Yu Wu, Tao Cheng, Hun-Hsien Chang, M.J.-N. Wu, Talee Yu

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引用次数: 0

摘要

为了在更小的硅片布局面积上有效地实现高W/L比的CMOS输出缓冲器，提出了一种新的方形布局样式。采用这种布局方式，可以在不增加布局面积的情况下，有效提高低压亚微米CMOS集成电路中CMOS输出缓冲器的驱动能力。

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Efficient layout style of CMOS output buffer to improve driving capability of low-voltage submicron CMOS IC's

A novel square-type layout style is proposed to efficiently implement CMOS output buffer with larger W/L ratio into a smaller silicon layout area than that of conventional finger-type layout style. Using this proposed layout style, the driving capability of CMOS output buffer in low-voltage submicron CMOS IC's can be effectively improved without increasing the layout area.

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Proceedings of 4th International Conference on Solid-State and IC Technology

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