2022 IEEE Latin American Electron Devices Conference (LAEDC)最新文献

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Temperature dependence of current-voltage of Al/p-Si(100) and Ti/p-Si(100) Schottky barrier diodes Al/p-Si(100)和Ti/p-Si(100)肖特基势垒二极管电流-电压的温度依赖性
2022 IEEE Latin American Electron Devices Conference (LAEDC) Pub Date : 2022-07-04 DOI: 10.1109/LAEDC54796.2022.9908217
Arely Vazquez, J. Molina
{"title":"Temperature dependence of current-voltage of Al/p-Si(100) and Ti/p-Si(100) Schottky barrier diodes","authors":"Arely Vazquez, J. Molina","doi":"10.1109/LAEDC54796.2022.9908217","DOIUrl":"https://doi.org/10.1109/LAEDC54796.2022.9908217","url":null,"abstract":"The current-voltage (I-V) characteristics on Al/p-Si (100) and Ti/p-Si (100) Schottky barrier diodes (SD) in the temperature range of 25–85°C were carried out. The Schottky barrier height (SBH) and ideality factor n calculated for both metal-semiconductor (MS) structures by using thermionic emission theory showed a strong dependence on temperature. The metals employed (titanium and aluminum) during the fabrication process were characterized to obtain electrical and physical parameters.","PeriodicalId":276855,"journal":{"name":"2022 IEEE Latin American Electron Devices Conference (LAEDC)","volume":"289 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2022-07-04","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131999506","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Contribution of Carrier Quantization Effect towards Performance of Nanostructured CFTS/CFTSe Solar Cells 载流子量化效应对纳米结构CFTS/CFTSe太阳能电池性能的贡献
2022 IEEE Latin American Electron Devices Conference (LAEDC) Pub Date : 2022-07-04 DOI: 10.1109/LAEDC54796.2022.9908190
Shibi Varku, S. Routray, K. P. Pradhan
{"title":"Contribution of Carrier Quantization Effect towards Performance of Nanostructured CFTS/CFTSe Solar Cells","authors":"Shibi Varku, S. Routray, K. P. Pradhan","doi":"10.1109/LAEDC54796.2022.9908190","DOIUrl":"https://doi.org/10.1109/LAEDC54796.2022.9908190","url":null,"abstract":"In this work, a detailed analysis is carried out to evaluate the performance enhancement of CFTS solar cell with the inclusion of nano-structures. Multiple quantum well (QW) with CFTSe/CFTS as well constituents are embedded into the cell structure to maximize the power conversion efficiency. Numerical modeling of the cell structure is carried out with optimized parameters and analyzed. The performance of the CFTS solar cell is carried out with a variation in the number of QWs such as 2 and 10 QWs in a comparative manner with no QWs. Results indicate an escalation in device efficiency when the number of QWs are increased. A phenomenal efficiency of 18% is achieved with a fillfactor of 71% and 82% quantum efficiency from a 10 QW embedded structure.","PeriodicalId":276855,"journal":{"name":"2022 IEEE Latin American Electron Devices Conference (LAEDC)","volume":"73 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2022-07-04","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"133410868","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
Nanowire Array Solar Cells 纳米线阵列太阳能电池
2022 IEEE Latin American Electron Devices Conference (LAEDC) Pub Date : 2022-07-04 DOI: 10.1109/LAEDC54796.2022.9908230
S. Petrosyan, Varsenik Khachatryan, A. Yesayan
{"title":"Nanowire Array Solar Cells","authors":"S. Petrosyan, Varsenik Khachatryan, A. Yesayan","doi":"10.1109/LAEDC54796.2022.9908230","DOIUrl":"https://doi.org/10.1109/LAEDC54796.2022.9908230","url":null,"abstract":"The third-generation photovoltaic device based on nanowire (NW) array with radial p-n junctions is theoretically studied. We consider p-type vertical Si nanowire array regularly distributed in an n-type Si matrix with NWs radii varying from nano-scale to micro-scale. Theoretical investigations show that photovoltaic (PV) cell with radial p-n junction has some advantages compared to that with planar p-n junction as the distance required to collect minority carriers is decreased. The dependences of photovoltage, photocurrent, cell efficiency and open circuit voltage on nanowire array parameters are described.","PeriodicalId":276855,"journal":{"name":"2022 IEEE Latin American Electron Devices Conference (LAEDC)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2022-07-04","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"130830571","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Short Circuit Ruggedness of Trench Filled Superjunction Devices 沟槽填充超结器件的短路坚固性
2022 IEEE Latin American Electron Devices Conference (LAEDC) Pub Date : 2022-07-04 DOI: 10.1109/LAEDC54796.2022.9908223
Shubhankar Sharma, Yi Zheng, H. Wong
{"title":"Short Circuit Ruggedness of Trench Filled Superjunction Devices","authors":"Shubhankar Sharma, Yi Zheng, H. Wong","doi":"10.1109/LAEDC54796.2022.9908223","DOIUrl":"https://doi.org/10.1109/LAEDC54796.2022.9908223","url":null,"abstract":"In this study, TCAD simulations are used to construct trench seuperjunction devices with similars BV (~750V) and Ron,sp < 10mΩ.cm2. TCAD mixed-mode simulation with self-heating is then used to study their short-circuit ruggedness. It is found that “p-sidewall” and “charge sheet” have shorter short circuit withstanding time, τsc. High thermal conductivity materials are then proposed to alleviate the problem and verified in TCAD simulations.","PeriodicalId":276855,"journal":{"name":"2022 IEEE Latin American Electron Devices Conference (LAEDC)","volume":"5 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2022-07-04","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"130530508","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
High electrical conductivity of P type a-SiGe:H films deposited by PECVD PECVD沉积P型a-SiGe:H薄膜的高导电性
2022 IEEE Latin American Electron Devices Conference (LAEDC) Pub Date : 2022-07-04 DOI: 10.1109/LAEDC54796.2022.9908209
Ernesto Francoq, A. Torres
{"title":"High electrical conductivity of P type a-SiGe:H films deposited by PECVD","authors":"Ernesto Francoq, A. Torres","doi":"10.1109/LAEDC54796.2022.9908209","DOIUrl":"https://doi.org/10.1109/LAEDC54796.2022.9908209","url":null,"abstract":"Highly doped films P type a-SiGe:H and undoped a-SiGe:H films with different germanium content were studied by electrical and morphology characterization for increase their electrical conductivity value (maximum value found: 6.1 × 10−2 Ω−1cm−1). The samples were deposited by low frequency (LF) PECVD at 200°C, 1.2 Torr of pressure at RF frequency of 110 kHz. Boron was used as dopant in the range from 0.26 % to 4% in steps of 0.26% approximately. The most conductivity films were obtained at 4% boron in gas phase, this characteristic made the material attractive for development of TFTs as source and drain regions. Additionally, the p type material allows the possibility of producing the CMOS technology in the TFTs technology, also it may be deposited in flexible substrates and used in solar cell as emitter. On the other hand the a-Ge is used for passivating the surface of high-purity Ge detectors.","PeriodicalId":276855,"journal":{"name":"2022 IEEE Latin American Electron Devices Conference (LAEDC)","volume":"8 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2022-07-04","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128417406","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
Investigation of the Statistical Spread of the Time-Dependent Dielectric Breakdown in Polymeric Dielectrics for Galvanic Isolation 电隔离用聚合物介质中随时间介电击穿的统计扩散研究
2022 IEEE Latin American Electron Devices Conference (LAEDC) Pub Date : 2022-07-04 DOI: 10.1109/LAEDC54796.2022.9908226
G. Malavena, J. Mazzola, M. Greatti, C. M. Compagnoni, A. Lacaita, V. Marano, M. Lauria, D. Paci, F. Speroni, A. Spinelli
{"title":"Investigation of the Statistical Spread of the Time-Dependent Dielectric Breakdown in Polymeric Dielectrics for Galvanic Isolation","authors":"G. Malavena, J. Mazzola, M. Greatti, C. M. Compagnoni, A. Lacaita, V. Marano, M. Lauria, D. Paci, F. Speroni, A. Spinelli","doi":"10.1109/LAEDC54796.2022.9908226","DOIUrl":"https://doi.org/10.1109/LAEDC54796.2022.9908226","url":null,"abstract":"We present a study of the statistical spread of the Time-Dependent Dielectric Breakdown (TDDB) in thick (>10 μm) polymeric dielectrics for galvanic isolation devices. By performing Monte Carlo simulations based on a thermochemical percolative model, we demonstrate, first of all, that in the case of a homogeneous dielectric the intrinsic TDDB spread arising from the statistics of local degradation of the material and percolative conduction across its entire thickness is negligible with respect to what typically observed experimentally. The experimental TDDB spread is, then, reproduced in the modeling framework by introducing inhomogeneities in the local material properties, giving rise to additional variability in the degradation dynamics leading to device breakdown. This approach is, finally, shown to be capable to explain the dependence of the TDDB spread on the magnitude of the electric field stressing the device.","PeriodicalId":276855,"journal":{"name":"2022 IEEE Latin American Electron Devices Conference (LAEDC)","volume":"30 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2022-07-04","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"117175522","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Parameter extraction in a 65nm nMOSFET technology from 300 K down to 3.8 K 65nm nMOSFET技术的参数提取从300k降至3.8 K
2022 IEEE Latin American Electron Devices Conference (LAEDC) Pub Date : 2022-07-04 DOI: 10.1109/LAEDC54796.2022.9908221
O. López-L, I. Martinez-R, D. Durini, D. Ferrusca, E. Gutiérrez-D., A. Ortiz-Conde
{"title":"Parameter extraction in a 65nm nMOSFET technology from 300 K down to 3.8 K","authors":"O. López-L, I. Martinez-R, D. Durini, D. Ferrusca, E. Gutiérrez-D., A. Ortiz-Conde","doi":"10.1109/LAEDC54796.2022.9908221","DOIUrl":"https://doi.org/10.1109/LAEDC54796.2022.9908221","url":null,"abstract":"In this article, we present a method to extract the parameters of MOSFETs at temperatures ranging from 3.8 K to 300 K. The method only requires simple DC measurements on a single test device in the triode region. The extracted parameters are: the threshold voltage, the series resistance, the mobility and the critical field at which the carriers are velocity saturated. We also show that mobility degradation, series resistance and velocity saturation produce equivalent effects in the triode region.","PeriodicalId":276855,"journal":{"name":"2022 IEEE Latin American Electron Devices Conference (LAEDC)","volume":"54 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2022-07-04","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122071072","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
Analysis of the Gate-Induced Drain Leakage of SOI Nanowire and Nanosheet MOS Transistors at High Temperatures 高温下SOI纳米线和纳米片MOS晶体管栅极感应漏极分析
2022 IEEE Latin American Electron Devices Conference (LAEDC) Pub Date : 2022-07-04 DOI: 10.1109/LAEDC54796.2022.9908212
M. de Souza, A. Cerdeira, M. Estrada, S. Barraud, M. Cassé, M. Vinet, O. Faynot, M. Pavanello
{"title":"Analysis of the Gate-Induced Drain Leakage of SOI Nanowire and Nanosheet MOS Transistors at High Temperatures","authors":"M. de Souza, A. Cerdeira, M. Estrada, S. Barraud, M. Cassé, M. Vinet, O. Faynot, M. Pavanello","doi":"10.1109/LAEDC54796.2022.9908212","DOIUrl":"https://doi.org/10.1109/LAEDC54796.2022.9908212","url":null,"abstract":"This work presents a comparison between the Gate-Induced Drain Leakage (GIDL) current of the nanowire (tri-gate MOSFET with narrow fin width) and nanosheet (tri-gate MOSFET with wide fin width) SOI MOSFETs at high temperatures, in the range between 300 K and 580 K. The study is conducted using experimental data, corroborated with 3D TCAD simulations. It is demonstrated that the GIDL current normalized by the total fin width is larger in nanosheet MOSFET than for the nanowire at high temperatures. Additionally, the nanosheet device presents a larger variation of the normalized GIDL current with the temperature than the nanowire one.","PeriodicalId":276855,"journal":{"name":"2022 IEEE Latin American Electron Devices Conference (LAEDC)","volume":"51 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2022-07-04","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"121822412","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 4
Preliminary Study of the Degradation of PM6:Y7-based Solar Cells PM6: y7基太阳能电池降解的初步研究
2022 IEEE Latin American Electron Devices Conference (LAEDC) Pub Date : 2022-07-04 DOI: 10.1109/LAEDC54796.2022.9908202
M. Ramírez-Como, E. Moustafa, A. A. A. Torimtubun, José G. Sánchez, J. Pallarès, L. Marsal
{"title":"Preliminary Study of the Degradation of PM6:Y7-based Solar Cells","authors":"M. Ramírez-Como, E. Moustafa, A. A. A. Torimtubun, José G. Sánchez, J. Pallarès, L. Marsal","doi":"10.1109/LAEDC54796.2022.9908202","DOIUrl":"https://doi.org/10.1109/LAEDC54796.2022.9908202","url":null,"abstract":"In this work, we report a degradation study of high-efficiency organic solar cells (OSCs). The active layer uses PM6 as a donor and Y7 as an acceptor material, respectively. High performance of the PM6:Y7-based device is achieved with the power conversion efficiency (PCE) of up to 17.3% under 1 sun illumination for the fresh device. To gain a better understanding of PM6:Y7 stability, we developed the analysis of the degradation process over the storage time. The PCE of the device decreased to 82% of the initial PCE after 888 h. The electrical parameters during the degradation process were extracted from the current density – voltage characteristics (J–V) under light and dark conditions.","PeriodicalId":276855,"journal":{"name":"2022 IEEE Latin American Electron Devices Conference (LAEDC)","volume":"6 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2022-07-04","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"127602749","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
An alternative radiation hardened by layout design in a CMOS technology 在CMOS技术中通过布局设计硬化了一种替代辐射
2022 IEEE Latin American Electron Devices Conference (LAEDC) Pub Date : 2022-07-04 DOI: 10.1109/LAEDC54796.2022.9908181
Carlos Alfredo Pelcastre Ortega, M. L. Aranda
{"title":"An alternative radiation hardened by layout design in a CMOS technology","authors":"Carlos Alfredo Pelcastre Ortega, M. L. Aranda","doi":"10.1109/LAEDC54796.2022.9908181","DOIUrl":"https://doi.org/10.1109/LAEDC54796.2022.9908181","url":null,"abstract":"Electronic circuits used in aerospace industry, particle physics research, and medical equipment need to work in radioactive environments and long-term exposure to radiation causes degradation of their electrical properties. One of the causes of device degradation is the effect of the total ionizing dose (TID). The accumulation of positive charges in silicon oxide (SiO2) is the main problem that generates the TID, the accumulation of charges causes changes in the threshold voltage, leakage current and the generation of parasitic transistors between N-type regions. To reduce the degradation caused by TID, several techniques have been researched, one of which is radiation hardening by design (RHBD). This paper presents a new layout technique named hourglass transistor; this new layout improves the radiation response to TID. The behavior of devices with the new layout was analyzed using 3D simulations with physical models, and a 130nm CMOS technology.","PeriodicalId":276855,"journal":{"name":"2022 IEEE Latin American Electron Devices Conference (LAEDC)","volume":"3 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2022-07-04","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115816792","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
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