Junki Jang, Kyoung-Woo Park, Chi-Seon Park, S. Yoo, S. Cha, K. Nam, Kihyun Kim, J. Son, Eunyoung Park, Jaeho Lee, Joosung Kim, Miji Lee, M. Yeo, EunJi Jung, R. Kim, Doohwan Park, Chin Kim, Yunki Choi, Taehong Ha, Jeonghoon Ahn, J. Ku
{"title":"Extreamly Advanced Cu Interconnect with Selective ALD Barrier for High Performance Logic Device","authors":"Junki Jang, Kyoung-Woo Park, Chi-Seon Park, S. Yoo, S. Cha, K. Nam, Kihyun Kim, J. Son, Eunyoung Park, Jaeho Lee, Joosung Kim, Miji Lee, M. Yeo, EunJi Jung, R. Kim, Doohwan Park, Chin Kim, Yunki Choi, Taehong Ha, Jeonghoon Ahn, J. Ku","doi":"10.1109/IITC/MAM57687.2023.10154689","DOIUrl":"https://doi.org/10.1109/IITC/MAM57687.2023.10154689","url":null,"abstract":"In this paper, selective atomic layer deposition (ALD) TaN barrier process was described for advanced high performance logic device. Compared to conventional ALD deposited barrier, selective barrier adopted process showed 40% lower via resistance and comparable electrical healthiness at various via test structures. By applying this process, we achieved better chip performance and comparable chip yield using internal foundry product. This result demonstrates manufacturability of a selective barrier for advanced high performance logic device. Keywords—Cu; Barrierless, ALD TaN;","PeriodicalId":241835,"journal":{"name":"2023 IEEE International Interconnect Technology Conference (IITC) and IEEE Materials for Advanced Metallization Conference (MAM)(IITC/MAM)","volume":"13 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2023-05-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131707893","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
K. Seidel, D. Lehninger, Sukhrob Abdulazhanov, A. Sünbül, R. Hoffmann, K. Zimmermann, N. Yadav, Q. H. Le, Matthias Landwehr, A. Heinig, H. Mähne, K. Bernert, S. Thiem, T. Kämpfe, M. Lederer
{"title":"A Ferroelectric BEoL Module: Adding Non-Volatile Memories and Varactors to Existing Technology Nodes","authors":"K. Seidel, D. Lehninger, Sukhrob Abdulazhanov, A. Sünbül, R. Hoffmann, K. Zimmermann, N. Yadav, Q. H. Le, Matthias Landwehr, A. Heinig, H. Mähne, K. Bernert, S. Thiem, T. Kämpfe, M. Lederer","doi":"10.1109/IITC/MAM57687.2023.10154868","DOIUrl":"https://doi.org/10.1109/IITC/MAM57687.2023.10154868","url":null,"abstract":"In this paper we show the potential of further device functionalization in interconnect layers on established technologies by implementing innovative ferroelectric films based on CMOS-compatible hafnium zirconium oxide (HZO). Thus, offering new opportunities for advanced system on chip solutions with reduced integration complexity and low technology cost adder. Based on the example of implemented ferroelectric capacitors in the BEoL of XFAB’s XT018 technology we demonstrate on the same wafer the versatility of such ferroelectric capacitors for the application as memory bitcell and varactor device.","PeriodicalId":241835,"journal":{"name":"2023 IEEE International Interconnect Technology Conference (IITC) and IEEE Materials for Advanced Metallization Conference (MAM)(IITC/MAM)","volume":"113 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2023-05-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131960184","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Ankit Pokhrel, Anshul Gupta, Minsoo Kim, J. Soulie, Sujan K. Sarkar, Y. Canvel, Vincent Renaud, B. Kenens, Blake Hodges, Trent Josephsen, Sabine O’Neal, Q. Herr, A. Herr, Z. Tokei
{"title":"Towards Enabling Two Metal Level Semi-Damascene Interconnects for Superconducting Digital Logic: Fabrication, Characterization and Electrical Measurements of Superconducting NbxTi(1-x)N","authors":"Ankit Pokhrel, Anshul Gupta, Minsoo Kim, J. Soulie, Sujan K. Sarkar, Y. Canvel, Vincent Renaud, B. Kenens, Blake Hodges, Trent Josephsen, Sabine O’Neal, Q. Herr, A. Herr, Z. Tokei","doi":"10.1109/IITC/MAM57687.2023.10154725","DOIUrl":"https://doi.org/10.1109/IITC/MAM57687.2023.10154725","url":null,"abstract":"NbxTi(1-x)N is a promising alternative to replace conventional Nb in superconducting devices. In this work, short loop devices with metal lines and vias were fabricated in IMEC 300-mm pilot line using direct metal etch, semi-damascene approach. Single line resistance of NbxTi(1-x)N wires show that >95% of devices meet the expected resistance of <5000 Ω/μm and leakage measurements show that >95% of devices have low leakage of <1E–16 A/ μm. Low temperature measurements show that the NbxTi(1-x)N wires have transition temperature of 12.5K within 0.5K that of thin film and a critical current of 0.15 mA, within 2X of theoretical maximum.","PeriodicalId":241835,"journal":{"name":"2023 IEEE International Interconnect Technology Conference (IITC) and IEEE Materials for Advanced Metallization Conference (MAM)(IITC/MAM)","volume":"3 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2023-05-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"134496528","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
R. Ishihara, J. Hermias, S. Neji, K. Yu, M. van der Maas, S. Nur, T. Iwai, T. Miyatake, S. Miyahara, K. Kawaguchi, S. Sato
{"title":"3D Integration for Modular Quantum Computer based on Diamond Spin Qubits","authors":"R. Ishihara, J. Hermias, S. Neji, K. Yu, M. van der Maas, S. Nur, T. Iwai, T. Miyatake, S. Miyahara, K. Kawaguchi, S. Sato","doi":"10.1109/IITC/MAM57687.2023.10154649","DOIUrl":"https://doi.org/10.1109/IITC/MAM57687.2023.10154649","url":null,"abstract":"Quantum computer chip based on spin qubits in diamond uses modules that are entangled with on-chip optical links. This enables an increased connectivity and a negligible crosstalk and error-rate when the number of qubits increases onchip. Here, 3D integration is the key enabling technology for a large-scale integration of the diamond spin qubits with photonic and electronic circuits for routing, control and readout of qubits. There are several engineering challenges to integrate the large number of spins in diamond with the on-chip circuits operating at a cryogenic temperature. In this paper we will address challenges, present recent results and discuss future outlook of the integration technology for realization of a scalable quantum computer based on diamond spin qubits.","PeriodicalId":241835,"journal":{"name":"2023 IEEE International Interconnect Technology Conference (IITC) and IEEE Materials for Advanced Metallization Conference (MAM)(IITC/MAM)","volume":"60 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2023-05-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"126161422","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Juliette Auffret, T. Mourier, L. Boutafa, Nadia Miloud-Ali Berchet, Yacoub Sahouane, N. Raphoz
{"title":"Development of copper μbumps based flip chip assembly for heterogeneous photonic integration","authors":"Juliette Auffret, T. Mourier, L. Boutafa, Nadia Miloud-Ali Berchet, Yacoub Sahouane, N. Raphoz","doi":"10.1109/IITC/MAM57687.2023.10154798","DOIUrl":"https://doi.org/10.1109/IITC/MAM57687.2023.10154798","url":null,"abstract":"Heterogeneous integration of photonic devices with electronic Integrated Circuits (IC) or microlenses is increasing rapidly and moves from prototyping to mass volume manufacturing. One of the key process for this integration is the hybridization of the photonic device with the other component. Based on the choice of using electrochemically deposited lead free solder copper pillars, this paper will describe the development and comparison of two different flip chip processes, thermo-compression and mass reflow, with regard to the constrains and specifications of different integration schemes developed for Lidar or telecom applications. The final choice for each will be based on the compromise between assembly robustness and high throughput for manufacturing.","PeriodicalId":241835,"journal":{"name":"2023 IEEE International Interconnect Technology Conference (IITC) and IEEE Materials for Advanced Metallization Conference (MAM)(IITC/MAM)","volume":"13 5 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2023-05-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128958687","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Takeyasu Saito, Kazunobu Wakamatsu, Kazuki Ueda, N. Okamoto
{"title":"Evaluation of Reactive Sputtered Ti-group MAX Alloy with Different A Elements for Wiring Material","authors":"Takeyasu Saito, Kazunobu Wakamatsu, Kazuki Ueda, N. Okamoto","doi":"10.1109/IITC/MAM57687.2023.10154627","DOIUrl":"https://doi.org/10.1109/IITC/MAM57687.2023.10154627","url":null,"abstract":"TiSiCN thin film, as a Ti-based MAX compounds, was prepared through reactive sputtering with Ar or N2 to evaluate as a wiring material instead of Cu. We investigated in detail the effects of target composition by changing Si area on TiC disk as a sputtering target to control Si/TiC ratio and also investigated the effects of film formation conditions on film orientation, surface morphology, and sheet resistance.","PeriodicalId":241835,"journal":{"name":"2023 IEEE International Interconnect Technology Conference (IITC) and IEEE Materials for Advanced Metallization Conference (MAM)(IITC/MAM)","volume":"43 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2023-05-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"127636941","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
D. Shim, A. Kini, M. Mallikarjuna, Piyush Kumar, A. Naeemi
{"title":"Signal-Power Interconnect Co-Design Based on Various Technology Options","authors":"D. Shim, A. Kini, M. Mallikarjuna, Piyush Kumar, A. Naeemi","doi":"10.1109/IITC/MAM57687.2023.10154860","DOIUrl":"https://doi.org/10.1109/IITC/MAM57687.2023.10154860","url":null,"abstract":"While the impact of various BEOL improvements on circuit-level PPA has been well studied, their implications for PDNs have not been properly explored. This paper presents a signal-power co-optimization flow using early IR drop analysis after the placement stage. Using this flow, we studied the impact of thinning down the metal barriers of Cu interconnects or replacing Cu with Ru at the local level on PDN and circuit performance. We observed that the design frequency improves by 66% by thinning down the metal barriers and by 58.3% by replacing local Cu interconnects with Ru for a given IR drop budget.","PeriodicalId":241835,"journal":{"name":"2023 IEEE International Interconnect Technology Conference (IITC) and IEEE Materials for Advanced Metallization Conference (MAM)(IITC/MAM)","volume":"150 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2023-05-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"117194019","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
A. Clausner, J. Silomon, Dulguun Chimeg, E. Zschech
{"title":"Mechanical BEoL Robustness Evaluation Using Variable Loading Strategies and Acoustic Emission Damage Monitoring","authors":"A. Clausner, J. Silomon, Dulguun Chimeg, E. Zschech","doi":"10.1109/IITC/MAM57687.2023.10154729","DOIUrl":"https://doi.org/10.1109/IITC/MAM57687.2023.10154729","url":null,"abstract":"On-chip interconnect stacks (Back End of Line, BEoL) in modern heterogeneous microelectronic products are exposed to various micromechanical loads. Each can lead to different failure modes of the whole system. To locally probe the micromechanical robustness of BEoL stacks, it is necessary to precisely control the mechanical loading conditions there. Three micromechanical BEoL robustness evaluation designs are presented, enabling a load and failure mode-adapted damage induction and identification. Those enable to test BEoL structures below and in the vicinity of Cu-pillars in compression, shear, and tensile mode. Acoustic Emission sensing capabilities are implemented to detect the very early stages of mechanical failures.","PeriodicalId":241835,"journal":{"name":"2023 IEEE International Interconnect Technology Conference (IITC) and IEEE Materials for Advanced Metallization Conference (MAM)(IITC/MAM)","volume":"34 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2023-05-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"132063221","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Reduced resistivity of NiAl by backthinning for advanced interconnect metallization","authors":"J. Soulie, Z. Tokei, N. Heylen, C. Adelmann","doi":"10.1109/IITC/MAM57687.2023.10154878","DOIUrl":"https://doi.org/10.1109/IITC/MAM57687.2023.10154878","url":null,"abstract":"NiAl lias been investigated as a potential alternative for Cu in future interconnect metallization schemes. Backthinning experiments of thick NiAl films (> 50 nm) by IBE or CMP leads to large grain sizes for small thicknesses. NiAl deposited at 420°C by PVD shows a resistivity of 17 μΩcm for a 10 nm NiAl film. Combining deposition of epitaxial NiAl on Ge (100) with backthinning experiments using CMP led to a lower resistivity than PVD Ru: 11.5 μΩcm at 7.7 nm and 10.6μΩcm at 17.2 nm.","PeriodicalId":241835,"journal":{"name":"2023 IEEE International Interconnect Technology Conference (IITC) and IEEE Materials for Advanced Metallization Conference (MAM)(IITC/MAM)","volume":"27 2","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2023-05-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114050388","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}