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2018 IEEE 2nd Electron Devices Technology and Manufacturing Conference (EDTM)最新文献

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Fabrication and Characterization of Fully Depleted SOI MOSFETs on Ultrathin Circular Diaphragms Using Cost-Effective Minimal-Fab Process 超薄圆膜片上完全耗尽SOI mosfet的制备与表征
2018 IEEE 2nd Electron Devices Technology and Manufacturing Conference (EDTM) Pub Date : 2018-03-01 DOI: 10.1109/EDTM.2018.8421462
Y. Liu, H. Tanaka, N. Umeyama, K. Koga, S. Khumpuang, M. Nagao, T. Matsukawa, S. Hara
{"title":"Fabrication and Characterization of Fully Depleted SOI MOSFETs on Ultrathin Circular Diaphragms Using Cost-Effective Minimal-Fab Process","authors":"Y. Liu, H. Tanaka, N. Umeyama, K. Koga, S. Khumpuang, M. Nagao, T. Matsukawa, S. Hara","doi":"10.1109/EDTM.2018.8421462","DOIUrl":"https://doi.org/10.1109/EDTM.2018.8421462","url":null,"abstract":"FDSOI MOSFETs and CMOS ring oscillators with different current flow directions were fabricated on ultrathin circular diaphragms using minimal-fab process, and their electrical characteristics were systematically investigated. It was found that the drain current of the <110> channel MOSFETs and the oscillation frequency of CMOS ring oscillators are changed after diaphragm formation due to residual mechanical stress. This result is very useful for the digital type pressure sensor applications.","PeriodicalId":418495,"journal":{"name":"2018 IEEE 2nd Electron Devices Technology and Manufacturing Conference (EDTM)","volume":"11 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2018-03-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129274390","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Pre-Tapeout Design for Yield Application: Design based Diffing, Pattern Analytics and Risk Scoring 产量应用的预采绒设计:基于差异、模式分析和风险评分的设计
2018 IEEE 2nd Electron Devices Technology and Manufacturing Conference (EDTM) Pub Date : 2018-03-01 DOI: 10.1109/EDTM.2018.8421477
R. Salem, Vic Vadi, A. Pinto, P. Pathak, Ya-Chieh Lai, Frank Gennari, P. Hurat
{"title":"Pre-Tapeout Design for Yield Application: Design based Diffing, Pattern Analytics and Risk Scoring","authors":"R. Salem, Vic Vadi, A. Pinto, P. Pathak, Ya-Chieh Lai, Frank Gennari, P. Hurat","doi":"10.1109/EDTM.2018.8421477","DOIUrl":"https://doi.org/10.1109/EDTM.2018.8421477","url":null,"abstract":"Integrated Circuit manufacturing complexities have resulted in decreased defect limited and parametric limited yields. In leading-edge technologies, silicon learnings are very limited, especially in the early phase of the technology development. In this work, a novel approach of pre-tapeout and pre-mask making verification is introduced using a design diffing methodology to determine a population of new “foundry-unknown” patterns that were never introduced in previous products, scoring them based on their potential manufacturing risk, and identifying suspected yield detractor patterns.","PeriodicalId":418495,"journal":{"name":"2018 IEEE 2nd Electron Devices Technology and Manufacturing Conference (EDTM)","volume":"35 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2018-03-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129508225","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
Silicon Photonic Multiport Optical Switch and Its Control Electronics 硅光子多端口光开关及其控制电子学
2018 IEEE 2nd Electron Devices Technology and Manufacturing Conference (EDTM) Pub Date : 2018-03-01 DOI: 10.1109/EDTM.2018.8421468
H. Kawashima, K. Tanizawa, Keijiro Suzuki, H. Matsuura, S. Suda, C. Guangwei, R. Konoike, S. Namiki, K. Ikeda
{"title":"Silicon Photonic Multiport Optical Switch and Its Control Electronics","authors":"H. Kawashima, K. Tanizawa, Keijiro Suzuki, H. Matsuura, S. Suda, C. Guangwei, R. Konoike, S. Namiki, K. Ikeda","doi":"10.1109/EDTM.2018.8421468","DOIUrl":"https://doi.org/10.1109/EDTM.2018.8421468","url":null,"abstract":"Dynamic optical path networks (DOPN) is a good approach for a growing traffic driven by video content. A key component for building DOPN is optical multiport switches. We review recent research progress on our own optical switches integrated by silicon photonics. Clarifying requirements on the switches, we describe preferred switch topologies, mechanism of phase-shifter, fabrication of silicon photonics, packaging techniques including flip-chip bonding, control electronics, steps for testing, and future prospects.","PeriodicalId":418495,"journal":{"name":"2018 IEEE 2nd Electron Devices Technology and Manufacturing Conference (EDTM)","volume":"490 2 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2018-03-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"134077830","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Evolution of the GPU Device widely used in AI and Massive Parallel Processing 在人工智能和大规模并行处理中广泛使用的GPU设备的演变
2018 IEEE 2nd Electron Devices Technology and Manufacturing Conference (EDTM) Pub Date : 2018-03-01 DOI: 10.1109/EDTM.2018.8421507
T. Baji
{"title":"Evolution of the GPU Device widely used in AI and Massive Parallel Processing","authors":"T. Baji","doi":"10.1109/EDTM.2018.8421507","DOIUrl":"https://doi.org/10.1109/EDTM.2018.8421507","url":null,"abstract":"While the CPU performance cannot benefits anymore from Moore's law, GPU (Graphic Processing Unit) still continue to increase its performance 1.5times/year. From this reason, GPU is now widely used not only for computer graphics but also for massive parallel processing and AI (Artificial Intelligence). In this paper, the details of this continuous performance growth, the constant evolution in transistors count and die size, and the scalable GPU architecture will be described.","PeriodicalId":418495,"journal":{"name":"2018 IEEE 2nd Electron Devices Technology and Manufacturing Conference (EDTM)","volume":"8 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2018-03-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128010560","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 25
Deep Neural Network for Device Modeling 用于设备建模的深度神经网络
2018 IEEE 2nd Electron Devices Technology and Manufacturing Conference (EDTM) Pub Date : 2018-03-01 DOI: 10.1109/EDTM.2018.8421454
Yuan Lei, Xiao Huo, Beiping Yan
{"title":"Deep Neural Network for Device Modeling","authors":"Yuan Lei, Xiao Huo, Beiping Yan","doi":"10.1109/EDTM.2018.8421454","DOIUrl":"https://doi.org/10.1109/EDTM.2018.8421454","url":null,"abstract":"High quality and high accuracy device model is an essential link from device simulation to circuit simulation. However, device model using artificial neural network (ANN) often causes unphysical behaviors. A novel deep neural network (DNN) approach for device modeling is proposed in this article. A novel regression method is used to eliminate unphysical behaviors. The developed DNN model has been verified by a complete set of physical measured data with smooth and accurate predicted results.","PeriodicalId":418495,"journal":{"name":"2018 IEEE 2nd Electron Devices Technology and Manufacturing Conference (EDTM)","volume":"12 3","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2018-03-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"121007186","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 14
Introduction of Seifu Nankai Jr. & Sr. High School Seifu南开中学简介
2018 IEEE 2nd Electron Devices Technology and Manufacturing Conference (EDTM) Pub Date : 2018-03-01 DOI: 10.1109/EDTM.2018.8421531
G. Horie, Y. Morita, S. Yamashita, Hideki Yoshikado, Ryotaro Kobayashi, Ryojiro Jogan, K. Fujii, Mai Tsukamoto, Ryuki Tachibana, H. Tomita
{"title":"Introduction of Seifu Nankai Jr. & Sr. High School","authors":"G. Horie, Y. Morita, S. Yamashita, Hideki Yoshikado, Ryotaro Kobayashi, Ryojiro Jogan, K. Fujii, Mai Tsukamoto, Ryuki Tachibana, H. Tomita","doi":"10.1109/EDTM.2018.8421531","DOIUrl":"https://doi.org/10.1109/EDTM.2018.8421531","url":null,"abstract":"Seifu Nankai High School was established in Takaishi City in Osaka in 1963. It used to be an all-boys school, but in 1999 it became coeducational. Our school's education is based on our three core values of trustworthiness, respect and reliability. We have been able to maintain a high level of education that enables our students to pass entrance examinations at prestigious universities.","PeriodicalId":418495,"journal":{"name":"2018 IEEE 2nd Electron Devices Technology and Manufacturing Conference (EDTM)","volume":"222 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2018-03-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115658630","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Soft Error Rate from Planar to FinFETs On Bulk Vs SOI Processes 从平面到 FinFET 的软误差率：块状工艺与 SOI 工艺的比较
2018 IEEE 2nd Electron Devices Technology and Manufacturing Conference (EDTM) Pub Date : 2018-03-01 DOI: 10.1109/EDTM.2018.8421487
Krishna Mohan Chavali, M. Natarajan
{"title":"Soft Error Rate from Planar to FinFETs On Bulk Vs SOI Processes","authors":"Krishna Mohan Chavali, M. Natarajan","doi":"10.1109/EDTM.2018.8421487","DOIUrl":"https://doi.org/10.1109/EDTM.2018.8421487","url":null,"abstract":"The Semiconductor scaling from planar to recent 3D Vertical FinFET process, have seen better than expected robustness against soft errors, in addition to significant performance and area scaling. This paper presents the SER scaling trends and comparison between earlier planar sub-micron nodes and FinFETs processes. The SER trends between Bulk Vs SOI processes on FinFET processes are also discussed using SRAM and Logic SER data collected using respective vehicles for comparisons. Also an analytical attempt made to validate if the earlier observed SOI Vs Bulk improvements seen on SER in Planar nodes and the scaling between them is still valid on FinFET processes.","PeriodicalId":418495,"journal":{"name":"2018 IEEE 2nd Electron Devices Technology and Manufacturing Conference (EDTM)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2018-03-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"130330574","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 2
Electrode material dependence of resistive switching behavior in Ta2O5 resistive analog neuromorphic device Ta2O5阻性模拟神经形态器件阻性开关行为的电极材料依赖性
2018 IEEE 2nd Electron Devices Technology and Manufacturing Conference (EDTM) Pub Date : 2018-03-01 DOI: 10.1109/EDTM.2018.8421520
H. Shima, Makoto Takahashi, Y. Naitoh, H. Akinaga
{"title":"Electrode material dependence of resistive switching behavior in Ta2O5 resistive analog neuromorphic device","authors":"H. Shima, Makoto Takahashi, Y. Naitoh, H. Akinaga","doi":"10.1109/EDTM.2018.8421520","DOIUrl":"https://doi.org/10.1109/EDTM.2018.8421520","url":null,"abstract":"High-speed analog resistance switching characteristics were demonstrated in TiN/TaO x/ Ta<inf>2</inf>O<inf>5</inf>/TiN resistive analog neuromorphic device (RAND). An introduction of the TiN electrode smoothed the discontinuity in both the resistance switching processes by DC and pulse voltages. On the other hands, digital resistance switching was dominant in TiN/TaO<inf>x</inf>/Ta<inf>2</inf>O<inf>5</inf>/Pt device. We deduce that the electrodes reactivity with oxygen plays a key role for the analog resistance switching.","PeriodicalId":418495,"journal":{"name":"2018 IEEE 2nd Electron Devices Technology and Manufacturing Conference (EDTM)","volume":"92 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2018-03-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"130697918","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 2
Cryogenic Characteristics of Ge channel Junctionless Nanowire Transistors 锗沟道无结纳米线晶体管的低温特性
2018 IEEE 2nd Electron Devices Technology and Manufacturing Conference (EDTM) Pub Date : 2018-03-01 DOI: 10.1109/EDTM.2018.8421519
C. Sun, R. Liang, Lei Xiao, Libin Liu, Jun Xu, Jing Wang
{"title":"Cryogenic Characteristics of Ge channel Junctionless Nanowire Transistors","authors":"C. Sun, R. Liang, Lei Xiao, Libin Liu, Jun Xu, Jing Wang","doi":"10.1109/EDTM.2018.8421519","DOIUrl":"https://doi.org/10.1109/EDTM.2018.8421519","url":null,"abstract":"We fabricated high performance Ge channel junctionless nanowire transistors (JNTs) and demonstrated their cryogenic characteristics from 90 to 270 K. The results show that the leakage current is more sensitive to temperature than drive current. The slope of threshold voltage shift with temperature is estimated to be 2.5 mV/K. Low field mobility decreases with reduced temperature and is found to be limited by both Coulomb scattering and neutral defects scattering.","PeriodicalId":418495,"journal":{"name":"2018 IEEE 2nd Electron Devices Technology and Manufacturing Conference (EDTM)","volume":"2 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2018-03-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128502419","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
Trends in Manufacturing Productivity and Yield Enhancement for Interconnected Devices and Industries 互联设备和工业的生产效率和良率提升趋势
2018 IEEE 2nd Electron Devices Technology and Manufacturing Conference (EDTM) Pub Date : 2018-03-01 DOI: 10.1109/EDTM.2018.8421418
R. Mih
{"title":"Trends in Manufacturing Productivity and Yield Enhancement for Interconnected Devices and Industries","authors":"R. Mih","doi":"10.1109/EDTM.2018.8421418","DOIUrl":"https://doi.org/10.1109/EDTM.2018.8421418","url":null,"abstract":"The global number of networked devices is expected to grow from ∼15 billion in 2015 to over 75 billion by 2025 [1] as technology advances from networked devices in consumer applications to networked industries and subsequently to networked societies. According to IC Insights [2], ∼52% of the wafer starts for these devices will be in mature technology nodes >28 nm. This paper will review trends in manufacturing and yield techniques to meet these challenges. In particular, the use of process equipment sensors to create Equipment Health Monitors and Virtual Metrology algorithms, to detect process variation, and maintain machine performance and yield will be considered. Application of emerging technologies (Deep Learning) for manufacturing control and yield will also be discussed. These trends are critical to enable autonomous Smart Factory, also known as Industry 4.0 [3].","PeriodicalId":418495,"journal":{"name":"2018 IEEE 2nd Electron Devices Technology and Manufacturing Conference (EDTM)","volume":"29 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2018-03-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"125977196","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 2
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