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2018 IEEE 2nd Electron Devices Technology and Manufacturing Conference (EDTM)最新文献

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Position Control and Gas Source CVD Growth Technologies of 2D MX2 Materials for Real LSI Applications 用于实际大规模集成电路的二维MX2材料的位置控制和气源CVD生长技术
2018 IEEE 2nd Electron Devices Technology and Manufacturing Conference (EDTM) Pub Date : 2018-03-01 DOI: 10.1109/EDTM.2018.8421437
T. Irisawa, N. Okada, W. Mizubayashi, T. Mori, W. Chang, K. Koga, A. Ando, K. Endo, S. Sasaki, T. Endo, Y. Miyata
{"title":"Position Control and Gas Source CVD Growth Technologies of 2D MX2 Materials for Real LSI Applications","authors":"T. Irisawa, N. Okada, W. Mizubayashi, T. Mori, W. Chang, K. Koga, A. Ando, K. Endo, S. Sasaki, T. Endo, Y. Miyata","doi":"10.1109/EDTM.2018.8421437","DOIUrl":"https://doi.org/10.1109/EDTM.2018.8421437","url":null,"abstract":"We have demonstrated position controlled CVD growth of metal dichacogenide (WS<inf>2</inf> and SnS<inf>2</inf>) by using patterned Si substrates. It was found that step edges effectively induced crystal nucleation and lateral crystal growth of 2D materials proceeded from there. Gas source CVD system applicable to industrial production has also been developed and WS<inf>2</inf> and SnS<inf>2</inf> synthesis have been confirmed.","PeriodicalId":418495,"journal":{"name":"2018 IEEE 2nd Electron Devices Technology and Manufacturing Conference (EDTM)","volume":"48 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2018-03-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124708320","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
Defect spectroscopy from electrical measurements: a simulation based technique 电测量缺陷光谱:一种基于模拟的技术
2018 IEEE 2nd Electron Devices Technology and Manufacturing Conference (EDTM) Pub Date : 2018-03-01 DOI: 10.1109/EDTM.2018.8421450
L. Larcher, A. Padovani, D. Pramanik, B. Kaczer, F. Palumbo
{"title":"Defect spectroscopy from electrical measurements: a simulation based technique","authors":"L. Larcher, A. Padovani, D. Pramanik, B. Kaczer, F. Palumbo","doi":"10.1109/EDTM.2018.8421450","DOIUrl":"https://doi.org/10.1109/EDTM.2018.8421450","url":null,"abstract":"We present in this paper a novel defect spectroscopy technique for extracting defect and material properties of gate oxides and dielectrics used for memory devices (e.g. DRAM, RRAM). The method is based on the correlate simulation of electrical characteristics (IV, CV, GV, BTI), to allow the determination of the energy distribution and depth profile of atomic defects within the material bandgap. This novel defect spectroscopy technique is applied to MOSFET gate stacks with Si and InGaAs, and to DRAM capacitors.","PeriodicalId":418495,"journal":{"name":"2018 IEEE 2nd Electron Devices Technology and Manufacturing Conference (EDTM)","volume":"2 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2018-03-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124875202","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
Heterogeneous Integration of GaN LED on CMOS Driver Circuit for Mobile Phone Applications 手机用CMOS驱动电路上GaN LED的异构集成
2018 IEEE 2nd Electron Devices Technology and Manufacturing Conference (EDTM) Pub Date : 2018-03-01 DOI: 10.1109/EDTM.2018.8421431
S. L. Selvaraj, Lulu Peng, Zou Qiong, Y. K. Seng, D. Disney
{"title":"Heterogeneous Integration of GaN LED on CMOS Driver Circuit for Mobile Phone Applications","authors":"S. L. Selvaraj, Lulu Peng, Zou Qiong, Y. K. Seng, D. Disney","doi":"10.1109/EDTM.2018.8421431","DOIUrl":"https://doi.org/10.1109/EDTM.2018.8421431","url":null,"abstract":"We have demonstrated the heterogeneous integration of GaN LEDs directly on top of silicon CMOS driver circuitry for further miniaturization of systems such as the smartphone flash. This novel fully-integrated system includes flash and torch mode functions. The integrated LED and driver chip shows good performance with maximum efficiency of 85.7%. The concept, circuit design integration process, and electrical performance will be further discussed in this paper.","PeriodicalId":418495,"journal":{"name":"2018 IEEE 2nd Electron Devices Technology and Manufacturing Conference (EDTM)","volume":"24 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2018-03-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124884108","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 4
Experimental and Simulation Study of Resistive Switching Properties in Novel Cu/Poly-Si/TiN CBRAM Crossbar Device 新型Cu/多晶硅/TiN CBRAM交叉棒器件阻性开关特性的实验与仿真研究
2018 IEEE 2nd Electron Devices Technology and Manufacturing Conference (EDTM) Pub Date : 2018-03-01 DOI: 10.1109/EDTM.2018.8421452
U. Chand, D. Berco, Ren Li, M. Alawein, H. Fariborzi
{"title":"Experimental and Simulation Study of Resistive Switching Properties in Novel Cu/Poly-Si/TiN CBRAM Crossbar Device","authors":"U. Chand, D. Berco, Ren Li, M. Alawein, H. Fariborzi","doi":"10.1109/EDTM.2018.8421452","DOIUrl":"https://doi.org/10.1109/EDTM.2018.8421452","url":null,"abstract":"In this work we demonstrate the uniform resistive switching (RS) behavior of Cu/Poly-Si/TiN CBRAM crossbar structure device. A significant improvement in endurance is demonstrated in Poly-Si CBRAM device compared to Silicon dioxide (SiO2) based device. The Cu/Poly-Si/TiN CBRAM device exhibits excellent memory performance, such as high ON/OFF resistance ratio, high endurance and good retention time (104 s). In addition to the experimental study, this work presents a numerical model for the Cu/Poly-Si/TiN CBRAM device. The simulation results based on this model perfectly match the experimental measurements.","PeriodicalId":418495,"journal":{"name":"2018 IEEE 2nd Electron Devices Technology and Manufacturing Conference (EDTM)","volume":"9 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2018-03-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"127960271","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
New Contact Metallization Scheme for FinFET and Beyond FinFET及以后的新型接触金属化方案
2018 IEEE 2nd Electron Devices Technology and Manufacturing Conference (EDTM) Pub Date : 2018-03-01 DOI: 10.1109/EDTM.2018.8421448
J. Koike, M. Hosseini, D. Ando, Y. Sutou
{"title":"New Contact Metallization Scheme for FinFET and Beyond","authors":"J. Koike, M. Hosseini, D. Ando, Y. Sutou","doi":"10.1109/EDTM.2018.8421448","DOIUrl":"https://doi.org/10.1109/EDTM.2018.8421448","url":null,"abstract":"A new metallization scheme of Co/CoTix alloy is proposed to replace conventional W contact plug and TiN/Ti barrier so as to alleviate increasing parasitic resistance of MOL with device scaling in sub-10 nm node. Annealing of the CoTix alloy layer led to the formation of epitaxial Co silicide and TiOx at the Co/Si interface. With this interface structure, a low contact resistivity of 10^{-9} Ω cm}^{2} was obtained on highly doped n-Si.","PeriodicalId":418495,"journal":{"name":"2018 IEEE 2nd Electron Devices Technology and Manufacturing Conference (EDTM)","volume":"1124 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2018-03-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"116477533","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 2
Nucleation-driven ferroelectric phase formation in ZrO2 thin films - What is different in ZrO2 from HfO2? ZrO2薄膜中成核驱动的铁电相形成- ZrO2与HfO2有什么不同?
2018 IEEE 2nd Electron Devices Technology and Manufacturing Conference (EDTM) Pub Date : 2018-03-01 DOI: 10.1109/EDTM.2018.8421483
S. Shibayama, T. Nishimura, S. Migita, A. Toriumi
{"title":"Nucleation-driven ferroelectric phase formation in ZrO2 thin films - What is different in ZrO2 from HfO2?","authors":"S. Shibayama, T. Nishimura, S. Migita, A. Toriumi","doi":"10.1109/EDTM.2018.8421483","DOIUrl":"https://doi.org/10.1109/EDTM.2018.8421483","url":null,"abstract":"Ferroelectric phase formation of ZrO2 thin films is discussed by paying attention to the film deposition process and doping into ZrO2, by comparing with the HfO2 counterpart. The results are showing a considerable difference between ZrO2 and HfO2 in terms of the stability against thermal annealing process. It is inferred that this is likely to be originated from the activation energy difference in the structural phase transitions from tetragonal to orthorhombic and subsequent orthorhombic to monoclinic phase transitions.","PeriodicalId":418495,"journal":{"name":"2018 IEEE 2nd Electron Devices Technology and Manufacturing Conference (EDTM)","volume":"43 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2018-03-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124155166","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 3
Study on the Direct Relationship between Macroscopic Electrical Parameters and Microscopic Channel Percolative Properties in Nanoscale MOSFETs 纳米mosfet中宏观电学参数与微观通道渗透特性的直接关系研究
2018 IEEE 2nd Electron Devices Technology and Manufacturing Conference (EDTM) Pub Date : 2018-03-01 DOI: 10.1109/EDTM.2018.8421424
Zhe Zhang, Runsheng Wang, Shaofeng Guo, Yangyuan Wang, Ru Huang
{"title":"Study on the Direct Relationship between Macroscopic Electrical Parameters and Microscopic Channel Percolative Properties in Nanoscale MOSFETs","authors":"Zhe Zhang, Runsheng Wang, Shaofeng Guo, Yangyuan Wang, Ru Huang","doi":"10.1109/EDTM.2018.8421424","DOIUrl":"https://doi.org/10.1109/EDTM.2018.8421424","url":null,"abstract":"In this paper, based on the quantitatively characterized factor of channel current percolation path (PP), the local current fluctuations characteristics in device channel can be directly determined by I-V curves only, which links the microscopic PPs to macroscopic device electrical parameters. The results indicate that the newly-defined “killer ratio” of PP is highly correlated with subthreshold swing degradation rate in both planar devices and FinFETs. It is also found that the current in PP area increases slower with V_{g} than the current in non-PP area, which is verified through TCAD and SPICE simulations. The explanation of the physical nature of correlated behavior sheds new light on understanding statistical variability and reliability in nanoscale devices.","PeriodicalId":418495,"journal":{"name":"2018 IEEE 2nd Electron Devices Technology and Manufacturing Conference (EDTM)","volume":"19 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2018-03-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"125229020","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Process Cost and Time in Minimal Fab to Fabricate Custom-made Microneedle Array with Extraction Tool 用萃取工具在最小晶圆厂制造定制微针阵列的工艺成本和时间
2018 IEEE 2nd Electron Devices Technology and Manufacturing Conference (EDTM) Pub Date : 2018-03-01 DOI: 10.1109/EDTM.2018.8421429
S. Khumpuang, Hiroyuki Tanaka, N. Umeyama, S. Hara
{"title":"Process Cost and Time in Minimal Fab to Fabricate Custom-made Microneedle Array with Extraction Tool","authors":"S. Khumpuang, Hiroyuki Tanaka, N. Umeyama, S. Hara","doi":"10.1109/EDTM.2018.8421429","DOIUrl":"https://doi.org/10.1109/EDTM.2018.8421429","url":null,"abstract":"This work presents, for the first time, the study of fabrication time together with running cost of a microneedle array fabricated using minimal fab. A Si hollow-microneedle array was fabricated on a half inch wafer within 7 hours and its process cost was less than $10/chip although the process was only one chip production. A portable and disposable dropper is simply produced and assembled with microneedle array for the application of liquid extraction that may extend to be used as a blood extraction tool. The extracted liquid by one finger-push and release, up to 0.8 ml of liquid can be drawn and store in the dropper.","PeriodicalId":418495,"journal":{"name":"2018 IEEE 2nd Electron Devices Technology and Manufacturing Conference (EDTM)","volume":"12 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2018-03-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131643829","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Design and Performance of π-Type Thin-Film Nano/Micro-TEG Using Vacuum/SiO2-Hybrid Insulation Module Structure 真空/ sio2复合绝缘模组结构π型薄膜纳米/微teg的设计与性能
2018 IEEE 2nd Electron Devices Technology and Manufacturing Conference (EDTM) Pub Date : 2018-03-01 DOI: 10.1109/EDTM.2018.8421509
T. Seino, N. Chiwaki, S. Yamashita, S. Sugahara
{"title":"Design and Performance of π-Type Thin-Film Nano/Micro-TEG Using Vacuum/SiO2-Hybrid Insulation Module Structure","authors":"T. Seino, N. Chiwaki, S. Yamashita, S. Sugahara","doi":"10.1109/EDTM.2018.8421509","DOIUrl":"https://doi.org/10.1109/EDTM.2018.8421509","url":null,"abstract":"A thin-film micro/nano-TEG (μ/nTEG}) using a new vacuum/insulator hybrid thermal-isolation module structure is computationally investigated for wearable device applications. The module has a more easy-to-fabricate structure than the corresponding vacuum thermal-isolation module that gives the performance limit of the μ/nTEG}. Nevertheless, it can exhibit high output power comparable to the vacuum thermal-isolation module. A design methodology using a single parameter that can represent the trade-off relation between thermal and electrical resistances is adapted for the proposed module. The optimized design shows a high performance suitable for wearable device applications.","PeriodicalId":418495,"journal":{"name":"2018 IEEE 2nd Electron Devices Technology and Manufacturing Conference (EDTM)","volume":"74 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2018-03-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"132885761","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 2
Analysis of DC Self Heating Effect in Stacked Nanosheet Gate-All-Around Transistor 层叠纳米片栅极全能晶体管直流自热效应分析
2018 IEEE 2nd Electron Devices Technology and Manufacturing Conference (EDTM) Pub Date : 2018-03-01 DOI: 10.1109/EDTM.2018.8421495
Min-Jae Kang, Ilho Myeong, Myounggon Kang, Hyungcheol Shin
{"title":"Analysis of DC Self Heating Effect in Stacked Nanosheet Gate-All-Around Transistor","authors":"Min-Jae Kang, Ilho Myeong, Myounggon Kang, Hyungcheol Shin","doi":"10.1109/EDTM.2018.8421495","DOIUrl":"https://doi.org/10.1109/EDTM.2018.8421495","url":null,"abstract":"In this paper, self-heating effect in newly introduced stacked nanosheet gate-all-around transistor is investigated and discussed, and several architecture parameters such as metal gate thickness, number of channels, thermal conductivity of ILD and channel thickness affecting thermal reliability of nanosheet FET are studied through simulations. It is illustrated that nanosheet FET shows great lattice temperature variations and thermal resistance fluctuations from changes in such architecture parameters, and these can be mitigated by increasing thermal conductivity of ILD, and metal gate thickness.","PeriodicalId":418495,"journal":{"name":"2018 IEEE 2nd Electron Devices Technology and Manufacturing Conference (EDTM)","volume":"42 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2018-03-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"121431516","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 8
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