{"title":"Thermal acceleration of compound semiconductors in humidity","authors":"W. Roesch","doi":"10.1109/ROCS.2005.201557","DOIUrl":"https://doi.org/10.1109/ROCS.2005.201557","url":null,"abstract":"Purpose Product reliability investigations typically include accelerated humidity testing. Originally, the \"standard\" test was a biased 8501/85% Relative Humidity (RH) lifetest for 1000 hours. Recently, a substitute accelerated version of this test has been used. The accelerated version is called HAST (Highly Accelerated Stress Test). The HAST conditions are also biased, at 1300C, 85%°RH, and approximately 18 PSI overpressure. The duration of the HAST test is normally 96100 hours to be equivalent to the 85/85 testtY1 This study is intended to investigate thermal acceleration and show that equivalent HAST tests on Compound Semiconductors are more highly accelerated and could be conducted much faster.","PeriodicalId":345081,"journal":{"name":"[Reliability of Compound Semiconductors] ROCS Workshop, 2005.","volume":"46 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2005-12-27","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128469700","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Reliability investigation of metal-semiconductor diodes in an E/D pHEMT process","authors":"S. Somisetty, P. Ersland, Xinxing Yang","doi":"10.1109/ROCS.2005.201564","DOIUrl":"https://doi.org/10.1109/ROCS.2005.201564","url":null,"abstract":"Metal-semiconductor diodes may be realized by various techniques, depending on application and processing technology. MIA-COM has recently developed an Enhancement/Depletion (EID) pHEMT process, used primarilyfor control circuits. In this process, both D-mode and E-mode FETs are configured as diodes, to serve functions such as voltage level shifting in digital logic circuits. We report here on a reliability study of E-mode FETs configured as diodes, and subjected to both high temperature and forward bias accelerated stress. Different failure modes observed during accelerated life tests of two diode configurations are discussed, and the causesfor aging are analyzed","PeriodicalId":345081,"journal":{"name":"[Reliability of Compound Semiconductors] ROCS Workshop, 2005.","volume":"44 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2005-12-27","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124542893","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
S.C. Chen, B. Hsiao, F. Chou, K. Yu, H. Chou, C. Wu
{"title":"An investigation and comparison of 45-degree spread the modeland other techniques to extract junction temperature of HBT and PHEMT for reliability life test","authors":"S.C. Chen, B. Hsiao, F. Chou, K. Yu, H. Chou, C. Wu","doi":"10.1109/ROCS.2005.201555","DOIUrl":"https://doi.org/10.1109/ROCS.2005.201555","url":null,"abstract":"Several techniques were applied on HBT and pHEMT evaluation vehicles fabricated at WIN Semiconductors' 6-inch GaAs foundry to extract device's junction temperature and compare the results and their impacts on the accelerated life test. From the reliability results of Arrhenius plots, the 45' spread model WIN Semiconductors used to obtain Tj matched well with liquid crystal thermography (LC) and Cooke model, but the infrared microscopy (IR) shows its space resolution limitation on the small area devices.","PeriodicalId":345081,"journal":{"name":"[Reliability of Compound Semiconductors] ROCS Workshop, 2005.","volume":"22 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2005-12-27","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"132813040","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Reliability of compound semiconductor workshop historical review","authors":"W. Roesch","doi":"10.1109/ROCS.2005.201549","DOIUrl":"https://doi.org/10.1109/ROCS.2005.201549","url":null,"abstract":"This discussion is meant to look back at reliability progress over the last two decades and identify a few items that have been learned. While the Workshop addresses various specific Issues individually, It is the accumulation of a variety of data, information, and experience which forms the basis of an assessment of reliability. In the end, reliability is simply an insightful perception of facts and statistics. After 20 years of Workshop meetings, it is time to review, compare, and discuss the progress and the future of Compound Semiconductor Reliability.","PeriodicalId":345081,"journal":{"name":"[Reliability of Compound Semiconductors] ROCS Workshop, 2005.","volume":"45 6","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2005-12-27","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114042415","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"An overview of reliability testing challenges in integrated power amplifier modules for wireless applications","authors":"Y. Qu, P. Scott, L. Marchut, M. Ferrara","doi":"10.1109/ROCS.2005.201556","DOIUrl":"https://doi.org/10.1109/ROCS.2005.201556","url":null,"abstract":"When compound semiconductors first emerged in the communications market, they were marketed in the form of single die that were assembled in industry standard packages. Although the semiconductor materials were new, the reliability tests used to evaluate them were proven, time-tested standards adopted from the silicon industry. As the wireless industry continues to evolve, consumer electronics manufacturers have demanded more integration from their wireless component suppliers. Second and third generation wireless components now integrate features that would have historically required multiple physical components on the application board. The net result of this trend is a simplification of design for consumer end-product designers and a complication of design for component suppliers. In addition, the implications for reliability testing have proven significant. Present generation power amplifier modules contain as many as five semiconductor die from different fabrication processes, multiple passive surface mount devices, and an elaborate package substrate to connect all of the components together. This paper will discuss how industry trends in RF components have forced new approaches in component reliability testing. Reliability standards may also need to evolve to address the issues created by new RF integrated modules.","PeriodicalId":345081,"journal":{"name":"[Reliability of Compound Semiconductors] ROCS Workshop, 2005.","volume":"24 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2005-12-27","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122174921","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Full band ensemble monte carlo simulations for reliability investigation of highvoltage single & double heterojunction bipolar transistors for military and base station applications including a proposed high breakdown composite collector design","authors":"S. Madra","doi":"10.1109/ROCS.2005.201559","DOIUrl":"https://doi.org/10.1109/ROCS.2005.201559","url":null,"abstract":"High-voltage HBTsaregaining considerable interest foremerging military andcommercial CATV and microwave base station applications. Understanding ofcarrier transport anddynamics assumes vital importance to establish safe operating areas (SOAs) forthese devices inorder toavoid detrimental effects suchasimpact ionization leading todevice breakdown. Contemporary formalisms based on'drift-diffusion ' theories suffer from several shortcomings inaccurate modeling ofchare transport under such high-field regimes through sub-micron device geometries. Ourcomprehensive 'full-band' ensemble MonteCarlo simulations modelcharge transport through n-GalnP/p+GaAs/n-GaAs single heterojunction bipolar transistors (SHBTs), while establishing the ionization coefficients andv-Fcharacteristics forthecollector region. Double heterojunction bipolar transistors (DHBTs)involving acomposite collector design (CCD)withwidebandgap materials holdgreater promise in pushing theJohnson figure-of-merit forhighvoltage applications. However, CCD implementation involves numerous challenges, including butnotlimited tothefollowing: lattice matching toGaAs, negligible conduction bandoffset atallheterojunctions toavoid current blocking duetopotential 'spike', loweffective massandhigh electron velocity, acceptable dielectric permittivity, wideseparation between valence andconduction bandto avoid high-field tunneling, high breakdown strength andimpact ionization threshold energies. Wediscuss ahighbreakdown composite collector DHBTwhich incorporates all these desirable aspects.","PeriodicalId":345081,"journal":{"name":"[Reliability of Compound Semiconductors] ROCS Workshop, 2005.","volume":"408 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2005-12-27","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122721467","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
P. van der Wel, R.A. van den Heuvel, H. Peuscher, Y. Li, J. G. Gommans, F. van Rijs, P. Bron, S. Theeuwen
{"title":"Application of aluminium metallisation in ldmos RF power applications","authors":"P. van der Wel, R.A. van den Heuvel, H. Peuscher, Y. Li, J. G. Gommans, F. van Rijs, P. Bron, S. Theeuwen","doi":"10.1109/ROCS.2005.201561","DOIUrl":"https://doi.org/10.1109/ROCS.2005.201561","url":null,"abstract":"In this paper we will compare the electromigration properties of the old (Gold based) and new (Aluminium based) metallisation schemes as used in RF base station power amplifiers manufactured by Philips Semiconductors. We will show that the latest generation shows excellent reliability performance while the RF perfonnance has been strongly enhanced. This has been obtained by optimizing the process and device architecture. Both results of electromigration measurements on test structures and electromigration degradation of full devices will be shown. It is concluded that the latest generation LDMOS RF amplifiers shows excellent RF and reliability performance while using an Aluminium based metallisation scheme.","PeriodicalId":345081,"journal":{"name":"[Reliability of Compound Semiconductors] ROCS Workshop, 2005.","volume":"349 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2005-12-27","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122756395","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Reliability of E/D PHEMT process for control circuit applications","authors":"Xinxing Yang, P. Ersland","doi":"10.1109/ROCS.2005.201566","DOIUrl":"https://doi.org/10.1109/ROCS.2005.201566","url":null,"abstract":"WA-COM has developed an E/D pHEMT process for use in control circuit applications. By adding an E-mode FET to our existing D-mode pHEMT switch process, we are able to integrate logic circuits onto the same die as the RF portion of complex control products (multi-throw switches, multi bit attenuators, etc.). While this capability is not uncommon in the GaAs community, it is new for our fab, and provided new challenges both in processing and in reliability testing. We conducted many tests that focused on the reliability characteristics of this new Emode FET; in the meanwhile, we also needed to assure no degradation of the already qualified D-mode FET. While our initial test suggested low mean-time-tofailure (MTTF) for E-mode devices, recent reliability results have been much better, exceeding our minimum MTTF requirement of 106 hours at channel temperature TCH= 125 °C. Our analysis also shows that devices from this process have high activation energy (Ea 1.6 eV).","PeriodicalId":345081,"journal":{"name":"[Reliability of Compound Semiconductors] ROCS Workshop, 2005.","volume":"172 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2005-12-27","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123226450","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Y. Chou, D. Leung, M. Biedenbender, D. Eng, Q. Kan, R. Lai, T. Block, A. Oki
{"title":"Physical evidence of electromigration in GaAs PHEMT Schottky diodes operating at high forward current density","authors":"Y. Chou, D. Leung, M. Biedenbender, D. Eng, Q. Kan, R. Lai, T. Block, A. Oki","doi":"10.1109/ROCS.2005.201565","DOIUrl":"https://doi.org/10.1109/ROCS.2005.201565","url":null,"abstract":"Elevated two-temperature lifetests at Tambient of 265°C and 280°C were performed on GaAs PHEIMT Schottky diodes with various gate lengths of 0. 1, 0. 15, and 0.2 gm. During lifetesting, the diodes were stressed at 500 mA/mm. Metal voids were observed on devices operating at forward current density . 1.2x106 Amps/cm2 (MIL-M-38510: 6x105 Amps/cm2), in addition to Ti diffusion into the AlGaAs Schottky barrier layer with Ti/Pt/Au metal stacks. The formation of metal voids is attributed to Au electromigration. Based on these results, reliability guidelines of GaAs PHEMT Schottky diodes with different gate lengths were established. The safe-operation-areas (SOA) are 0.5, 0.8, and 2 mA/finger for GaAs PHEMT Schottky diodes with gate lengths of 0.1, 0.15, and 0.2 gim, respectively.","PeriodicalId":345081,"journal":{"name":"[Reliability of Compound Semiconductors] ROCS Workshop, 2005.","volume":"&NA; 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1900-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"126258179","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Reliability testing of an lna with 0.18 /spl mu/m gate process","authors":"H. Jen, P. Ersland, C. Gil, Shiou Lung, G. Chu","doi":"10.1109/ROCS.2005.201563","DOIUrl":"https://doi.org/10.1109/ROCS.2005.201563","url":null,"abstract":"Devices manufactured using a short gate length (0. 18um) pHEMTprocess can achieve very low noisefigure at highfreqzency. This process is targetedfor a variety ofcommercial and military applications. Process reliability tests including ESD, DPA, HTOL, HAST, and TC were performed on a test vehicle with 500pm gate peripheryfrom this process. Results are presentedfor each ofthese tests. Of the early engineering wafers tested (from separate lots), the wafer with in specification PCM data passed HTOL with Mean-Time-To-Failure of 1.42x106 hours and an activation energy of 1.08eV. Reliability test results correlated very well with the process control monitor (PCM) data used to determine whether to accept or reject wafers.","PeriodicalId":345081,"journal":{"name":"[Reliability of Compound Semiconductors] ROCS Workshop, 2005.","volume":"30 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1900-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"125296133","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}