2008 International Conference on Advanced Semiconductor Devices and Microsystems最新文献

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DRIE and Bonding Assisted Low Cost MEMS Processing of In-plane HAR Inertial Sensors 驱动和键合辅助平面内HAR惯性传感器的低成本MEMS加工
2008 International Conference on Advanced Semiconductor Devices and Microsystems Pub Date : 2008-10-12 DOI: 10.1109/ASDAM.2008.4743350
V. Rajaraman, K. Makinwa, P. French
{"title":"DRIE and Bonding Assisted Low Cost MEMS Processing of In-plane HAR Inertial Sensors","authors":"V. Rajaraman, K. Makinwa, P. French","doi":"10.1109/ASDAM.2008.4743350","DOIUrl":"https://doi.org/10.1109/ASDAM.2008.4743350","url":null,"abstract":"We present a simple, flexible and low cost MEMS fabrication process, developed using deep reactive ion etching (DRIE) and wafer bonding technologies, for manufacturing in-plane high aspect ratio (HAR) inertial sensors. Among examples, the design and fabrication results of a two axis inertial device are presented. Fabricated device thickness ranged up to 140 mum and a HAR of 28 was obtained. Compared to the existing approaches reported in literature, the salient features of the presented process are: single-sided single-wafer processing using just two lithographic masks, capability to fabricate standalone MEMS as well as CMOS compatible MEMS post-processing via process variations, the use of plasma etching for wafer thinning that facilitates stictionless dry-release of MEMS, and its suitability for batch processing.","PeriodicalId":306699,"journal":{"name":"2008 International Conference on Advanced Semiconductor Devices and Microsystems","volume":"25 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2008-10-12","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"116746610","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 5
Design and Fabrication of High-Temperature SOI Strain-Gauges 高温SOI应变片的设计与制作
2008 International Conference on Advanced Semiconductor Devices and Microsystems Pub Date : 2008-10-01 DOI: 10.1109/ASDAM.2008.4743310
P. Kulha, A. Bouřa, M. Husák, P. Mikulík, M. Kucera, S. Valenda
{"title":"Design and Fabrication of High-Temperature SOI Strain-Gauges","authors":"P. Kulha, A. Bouřa, M. Husák, P. Mikulík, M. Kucera, S. Valenda","doi":"10.1109/ASDAM.2008.4743310","DOIUrl":"https://doi.org/10.1109/ASDAM.2008.4743310","url":null,"abstract":"The following paper introduces the coventor ware design environment for SOI based piezoresistive sensor design. Fabrication process and characterization of designed sensors is also presented. The software package Coventor Ware has been used for design of mechanical and electrical characteristics of the structure. The tools enable design, modelling and successive modification of designed MEMS structures. The program enables: drawing of 2D layout and its editing, simulation of production process, generation of 3D model from 2D masks, generation of network by the method offinite elements, solution of mechanical, piezoresistive, thermal and further simulations. Simple passive elements (strain sensitive resistors - piezoresistors) were fabricated on SIMOX SOI substrates with sputtered AlCuSi metallization. Basic parameter extraction and their temperature dependence were performed.","PeriodicalId":306699,"journal":{"name":"2008 International Conference on Advanced Semiconductor Devices and Microsystems","volume":"13 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2008-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115494641","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Ruthenium based Schottky contacts on n-type GaN n型氮化镓上的钌基肖特基触点
2008 International Conference on Advanced Semiconductor Devices and Microsystems Pub Date : 2008-10-01 DOI: 10.1109/ASDAM.2008.4743313
W. Macherzyński, A. Szyszka, B. Paszkiewicz, R. Paszkiewicz, M. Tlaczala
{"title":"Ruthenium based Schottky contacts on n-type GaN","authors":"W. Macherzyński, A. Szyszka, B. Paszkiewicz, R. Paszkiewicz, M. Tlaczala","doi":"10.1109/ASDAM.2008.4743313","DOIUrl":"https://doi.org/10.1109/ASDAM.2008.4743313","url":null,"abstract":"The paper presents the investigation of ruthenium based Schottky contact to n-GaN:Si layers with different Si concentration grown by metalorganic vapour phase epitaxy (MOVPE) technique. Metallizations of ruthenium/gold were evaporated by an electron gun (Ru) and resistance heater (Au). The contacts were sequentially annealed at rapid thermal annealing (RTA) system under nitrogen ambient at various temperatures from 200degC to 650degC. The time of annealing process was 2 minutes. The barrier height of ruthenium based Schottky contacts to n-GaN MOVPE epitaxial layers were studied in a function of annealing temperature by current-voltage (I-V) method on dedicated test structures. The barrier heights of as-deposited Au/Ru/n-GaN Schottky contacts were evaluated and found to be 0.61 eV (n<sub>d</sub>=9.9times10<sup>16</sup> cm<sup>3</sup>) and 0.19 eV (n<sub>d</sub>=8times10<sup>17</sup> cm<sup>-3</sup>). It was established that the temperature of 500degC was the most suitable for obtaining the highest values of Schottky barrier height (SBH) like 1.1 eV (n<sub>d</sub>=9.9times10<sup>16</sup> cm<sup>-3</sup>) and 0.51 eV (n<sub>d</sub>=8times10<sup>17</sup> cm<sup>-3</sup>) of Schottky contact based on ruthenium.","PeriodicalId":306699,"journal":{"name":"2008 International Conference on Advanced Semiconductor Devices and Microsystems","volume":"51 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2008-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129242761","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
Wet thermal oxidation for GaAs, GaN and Metal/GaN device applications 用于GaAs, GaN和金属/GaN器件的湿式热氧化
2008 International Conference on Advanced Semiconductor Devices and Microsystems Pub Date : 2008-10-01 DOI: 10.1109/ASDAM.2008.4743306
R. Korbutowicz, Joanna Pra, Zbigniew Wagrowski, A. Szyszka, M. Tlaczala
{"title":"Wet thermal oxidation for GaAs, GaN and Metal/GaN device applications","authors":"R. Korbutowicz, Joanna Pra, Zbigniew Wagrowski, A. Szyszka, M. Tlaczala","doi":"10.1109/ASDAM.2008.4743306","DOIUrl":"https://doi.org/10.1109/ASDAM.2008.4743306","url":null,"abstract":"Thermal wet oxidation of gallium arsenide GaAs (wafers) and gallium nitride GaN (layers from metalorganic vapor phase epitaxy MOVPE and hydride vapor phase epitaxy HVPE) was carried out in N2 as a main gas and H2O as an oxidizing agent. Materials parameters and surface morphology were studied by means x-ray diffraction, ellipsometry, photoreflectance PR, micro Raman spectroscopy, optical microscopy and atomic force microscopy AFM. The lack of materials parameters or their wide range, especially refractive index, dielectric constant and their dependence of oxide's composition and structure constituted some problems during measurements. GaAs oxidation was more difficult as GaN oxidation, especially GaN from HVPE.","PeriodicalId":306699,"journal":{"name":"2008 International Conference on Advanced Semiconductor Devices and Microsystems","volume":"167 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2008-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"116312684","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 9
Si3N4 based non-volatile memory structures with embedded Si nanocrystals 嵌入硅纳米晶的氮化硅非易失性存储结构
2008 International Conference on Advanced Semiconductor Devices and Microsystems Pub Date : 2008-10-01 DOI: 10.1109/ASDAM.2008.4743359
P. Basa, Z. Horváth, T. Jászi, A. Pap, G. Molnár, A. Kovalev, D. Wainstein, P. Turmezei
{"title":"Si3N4 based non-volatile memory structures with embedded Si nanocrystals","authors":"P. Basa, Z. Horváth, T. Jászi, A. Pap, G. Molnár, A. Kovalev, D. Wainstein, P. Turmezei","doi":"10.1109/ASDAM.2008.4743359","DOIUrl":"https://doi.org/10.1109/ASDAM.2008.4743359","url":null,"abstract":"Memory structures with an embedded sheet of separated Si nanocrystals were prepared by low pressure chemical vapour deposition using a Si<sub>3</sub>N<sub>4</sub> control layer and SiO<sub>2</sub> or Si<sub>3</sub>N<sub>4</sub> tunnel layers. It was obtained that a properly located layer of Si nanocrystals improves the charging behaviour of the MNOS structures. Memory window width of about 6.6 V and retention time of 41 years has been achieved for charging pulses of plusmn15 V, 10 ms.","PeriodicalId":306699,"journal":{"name":"2008 International Conference on Advanced Semiconductor Devices and Microsystems","volume":"17 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2008-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114816672","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Low-temperature hole mobility in rolled-up Si/SiGe heterostructures 卷起Si/SiGe异质结构中的低温空穴迁移率
2008 International Conference on Advanced Semiconductor Devices and Microsystems Pub Date : 2008-10-01 DOI: 10.1109/ASDAM.2008.4743367
N. Demarina, D. Gruetzmacher
{"title":"Low-temperature hole mobility in rolled-up Si/SiGe heterostructures","authors":"N. Demarina, D. Gruetzmacher","doi":"10.1109/ASDAM.2008.4743367","DOIUrl":"https://doi.org/10.1109/ASDAM.2008.4743367","url":null,"abstract":"We present a theoretical study of the low-field hole mobility in modulation doped scrolled SiGe heterostructures which can be realized from rolled-up strained Si-SiGe films. The simulation of the hole transport along the structure axis is based on a Monte Carlo method and includes hole interaction with phonons and interface roughness at low temperature. We show that the hole mobility is mainly limited by interface roughness scattering and can reach a value of 2times104 cm2/Vs.","PeriodicalId":306699,"journal":{"name":"2008 International Conference on Advanced Semiconductor Devices and Microsystems","volume":"63 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2008-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"127938912","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
Simulation studies of current voltage characteristics of inhomogeneous Schottky diode with discrete distribution of barrier heights 具有离散势垒高度分布的非均匀肖特基二极管电流电压特性的仿真研究
2008 International Conference on Advanced Semiconductor Devices and Microsystems Pub Date : 2008-10-01 DOI: 10.1109/ASDAM.2008.4743300
S. Chand
{"title":"Simulation studies of current voltage characteristics of inhomogeneous Schottky diode with discrete distribution of barrier heights","authors":"S. Chand","doi":"10.1109/ASDAM.2008.4743300","DOIUrl":"https://doi.org/10.1109/ASDAM.2008.4743300","url":null,"abstract":"The current voltage characteristics of inhomogeneous Schottky contact with discrete Gaussian distribution of barrier heights are simulated considering thermionic emission diffusion theory. The diode parameters are extracted by fitting of simulated current voltage data into thermionic emission diffusion current equation. The effect of discrete Gaussian distribution of barrier heights on barrier parameters like barrier height, ideality factor and activation energy plots are discussed.","PeriodicalId":306699,"journal":{"name":"2008 International Conference on Advanced Semiconductor Devices and Microsystems","volume":"5 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2008-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115495566","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Two-Dimensional Physical and Numerical Modelling of InP-based Heterojunction Bipolar Transistors 基于inp的异质结双极晶体管的二维物理和数值模拟
2008 International Conference on Advanced Semiconductor Devices and Microsystems Pub Date : 2008-10-01 DOI: 10.1109/ASDAM.2008.4743335
T. Tauqeer, J. Sexton, F. Amir, M. Missous
{"title":"Two-Dimensional Physical and Numerical Modelling of InP-based Heterojunction Bipolar Transistors","authors":"T. Tauqeer, J. Sexton, F. Amir, M. Missous","doi":"10.1109/ASDAM.2008.4743335","DOIUrl":"https://doi.org/10.1109/ASDAM.2008.4743335","url":null,"abstract":"State-of-the-art HBTs were designed, grown, fabricated and characterized in-house. The novelty of this process was the use of dimeric phosphorus generated from a Gallium Phosphide (GaP) decomposition source, which permitted growth at a fairly low temperature (420degC) while conserving extremely high quality materials. A self-aligned transistor with an emitter area of 5times5 mum2 demonstrated a low offset voltage of 150 mV and high current gain of 90. An excellent agreement with the measured data was achieved using physical modelling packages developed by SILVACO.","PeriodicalId":306699,"journal":{"name":"2008 International Conference on Advanced Semiconductor Devices and Microsystems","volume":"14 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2008-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124252719","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 14
Pentacene OTFT with parylene gate dielectric 聚对二甲苯栅极电介质的并五苯OTFT
2008 International Conference on Advanced Semiconductor Devices and Microsystems Pub Date : 2008-10-01 DOI: 10.1109/ASDAM.2008.4743302
J. Jakabovic, J. Kovác, R. Srnánek, M. Sokolský, D. Haško
{"title":"Pentacene OTFT with parylene gate dielectric","authors":"J. Jakabovic, J. Kovác, R. Srnánek, M. Sokolský, D. Haško","doi":"10.1109/ASDAM.2008.4743302","DOIUrl":"https://doi.org/10.1109/ASDAM.2008.4743302","url":null,"abstract":"Organic thin film transistors (OTFT) characteristics generally depend on organic semiconductor thin film growth conditions and the gate dielectric. Authors concerned with the basic properties of pentacene OTFT, where the gate dielectric consists of three different dielectric materials: SiO2 (HMDS treated), SiO2 covered with diacetylene SAM formed by the Langmuir-Blodgett method and SiO2 covered with thin parylene layer. The highest transistor drain current value was reached for 40 nm pentacene film prepared at 30degC on parylene dielectric layer which corresponds to charge mobility 0.15 cm2 V-1 s-1 for top contact OTFT structure. The analysis of molecular microstructure of the pentacene films confirmed the quality of pentacene film prepared on parylene dielectric layer using resonance micro-Raman spectroscopy.","PeriodicalId":306699,"journal":{"name":"2008 International Conference on Advanced Semiconductor Devices and Microsystems","volume":"438 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2008-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"116018744","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 4
Hydrogenated Amorphous Carbon Films Prepared by Plasma-enhanced Chemical Vapor Deposition 等离子体增强化学气相沉积制备氢化非晶碳薄膜
2008 International Conference on Advanced Semiconductor Devices and Microsystems Pub Date : 2008-10-01 DOI: 10.1109/ASDAM.2008.4743297
J. Huran, A. Kobzev, N. Balalykin, J. Pezoltd
{"title":"Hydrogenated Amorphous Carbon Films Prepared by Plasma-enhanced Chemical Vapor Deposition","authors":"J. Huran, A. Kobzev, N. Balalykin, J. Pezoltd","doi":"10.1109/ASDAM.2008.4743297","DOIUrl":"https://doi.org/10.1109/ASDAM.2008.4743297","url":null,"abstract":"A capacitively coupled plasma reactor was used for PECVD technology, where methane was introduced into the plasma reactor through the shower head. The concentration of species in the a-C:H films were determined by RBS and ERD method. The RBS results showed the main concentrations of C in the films. The concentration of hydrogen was approximately 20 at.%. The films contain a small amount of oxygen and nitrogen. Chemical compositions were analyzed by IR spectroscopy. IR results showed the presence of C-H specific bonds.","PeriodicalId":306699,"journal":{"name":"2008 International Conference on Advanced Semiconductor Devices and Microsystems","volume":"148 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2008-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"116341333","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
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