M. Denison, M. Pfost, Klaus-Willi Pieper, S. Markl, D. Metzner, M. Stecher
{"title":"Influence of inhomogeneous current distribution on the thermal SOA of integrated DMOS transistors","authors":"M. Denison, M. Pfost, Klaus-Willi Pieper, S. Markl, D. Metzner, M. Stecher","doi":"10.1109/WCT.2004.240293","DOIUrl":"https://doi.org/10.1109/WCT.2004.240293","url":null,"abstract":"The forward bias safe operating area (FBSOA) of integrated VDMOS transistors in a 60 V smart power technology is studied under single stress. It is shown that it is necessary to consider the operating point dependent current distribution across the device area to model the thermal limits of larger devices (/spl sim/mm/sup 2/). The transient temperature profile and the resulting electrical characteristics can be modeled using electro-thermal simulations, taking correctly the distributed nature of the device, and thus of the non-uniform power density into account.","PeriodicalId":303825,"journal":{"name":"2004 Proceedings of the 16th International Symposium on Power Semiconductor Devices and ICs","volume":"28 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2004-05-24","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128915732","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
A. Shibib, Shuming Xu, Zhijian Xie, P. Gammel, M. Mastrapasqua, I. Kizilyalli
{"title":"Control of hot carrier degradation in LDMOS devices by a dummy gate field plate: experimental demonstration","authors":"A. Shibib, Shuming Xu, Zhijian Xie, P. Gammel, M. Mastrapasqua, I. Kizilyalli","doi":"10.1109/WCT.2004.239939","DOIUrl":"https://doi.org/10.1109/WCT.2004.239939","url":null,"abstract":"It is experimentally demonstrated that hot carrier degradation in high voltage LDMOS devices can be minimized by adding a dummy gate field plate, DGFP, over the drain drift region close to the gate. The level of on resistance increase due to hot carrier stress can be controlled by design with the amount of the DGFP overlap of the drift region. Significant decrease in the degradation is experimentally observed by a 40% DGFP overlap without substantially affecting the breakdown voltage of the device. It was also demonstrated that the initial peak substrate/body current is a good indicator of the hot carrier degradation effect and can be used as a process monitor.","PeriodicalId":303825,"journal":{"name":"2004 Proceedings of the 16th International Symposium on Power Semiconductor Devices and ICs","volume":"61 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2004-05-24","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"116600442","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Advanced HiGT with low-injection punch-through (LiPT) structure [high-conductivity IGBT]","authors":"K. Oyama, T. Arai, K. Saitou, K. Masuda, M. Mori","doi":"10.1109/WCT.2004.239837","DOIUrl":"https://doi.org/10.1109/WCT.2004.239837","url":null,"abstract":"This paper describes a new advanced HiGT (high-conductivity IGBT) which is the combination of a low injection (LiPT: low injection punch-through) p-emitter and a planar gate with a hole barrier and punchthrough structure. The experimental results and theoretical discussion of this 4.5 kV advanced HiGT show remarkable low-loss characteristics and strong short-circuit immunity. These results prove for the first time that a hole barrier integrated in a planar IGBT is effective even with LiPT.","PeriodicalId":303825,"journal":{"name":"2004 Proceedings of the 16th International Symposium on Power Semiconductor Devices and ICs","volume":"20 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2004-05-24","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115148585","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Design of an RF LDMOSFET with deep drift and hot carrier immunity using time domain approach","authors":"G. Cao, E. Narayanan, M. M. De Souza","doi":"10.1109/WCT.2004.239970","DOIUrl":"https://doi.org/10.1109/WCT.2004.239970","url":null,"abstract":"An advanced RF LDMOSFET technology that incorporates a new deep drift region is presented. The deep drift region does not require any additional masking stage but exhibits significant benefits in terms of hot carrier related bias drift and process tolerance. The impact of the design is simulated under RF bias conditions using a novel time-domain approach. In contrast with large signal modelling, the time domain simulation can directly correlate RF performance to device and process technology. The simulation method avoids the need for fabrication prior to RF evaluation, with obvious benefits of shortening the device design cycle.","PeriodicalId":303825,"journal":{"name":"2004 Proceedings of the 16th International Symposium on Power Semiconductor Devices and ICs","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2004-05-24","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129789888","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
T. Naito, M. Takei, M. Nemoto, T. Hayashi, K. Ueno
{"title":"1200V reverse blocking IGBT with low loss for matrix converter","authors":"T. Naito, M. Takei, M. Nemoto, T. Hayashi, K. Ueno","doi":"10.1109/WCT.2004.239842","DOIUrl":"https://doi.org/10.1109/WCT.2004.239842","url":null,"abstract":"This paper presents, for the first time, the design concepts of an isolation type 1200 V reverse blocking IGBT (RB-IGBT) for matrix converters. The device features thin wafer technology and a deep boron diffusion technique. From experimental results, it has been found that the 1200 V RB-IGBT attains about 20% reduction in total generated loss when compared to the combination of the IGBT and the diode, while keeping improved blocking capability with both polarities. A high efficiency matrix converter can be achieved by using the RB-IGBTs and this has a great possibility to replace the conventional DC-linked-type circuits.","PeriodicalId":303825,"journal":{"name":"2004 Proceedings of the 16th International Symposium on Power Semiconductor Devices and ICs","volume":"213 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2004-05-24","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"121347538","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"A new monolithic power actuator devoted to high voltage and high frequency applications [emitter-switched bipolar transistor]","authors":"S. Musumeci, R. Pagano, A. Raciti","doi":"10.1109/WCT.2004.240353","DOIUrl":"https://doi.org/10.1109/WCT.2004.240353","url":null,"abstract":"A new monolithic emitter-switching bipolar transistor (ESBT) having a good switching behavior, along with a highly performing on-state conduction characteristic, is reported. The device is the cascode connection of a high voltage bipolar transistor and a fast-switching low-voltage power MOSFET, realized inside the BJT part. The structure, which is based on a monolithic technology, has been experimentally analyzed to derive several results, particularly dwelling upon the on-state conduction characteristic and the storage time behavior of the presented device.","PeriodicalId":303825,"journal":{"name":"2004 Proceedings of the 16th International Symposium on Power Semiconductor Devices and ICs","volume":"21 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2004-05-24","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"121353541","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Precision gate drive timing in a zero-voltage-switching DC-DC converter","authors":"O. Trescases, W. Ng, Shuoxi Chen","doi":"10.1109/WCT.2004.239750","DOIUrl":"https://doi.org/10.1109/WCT.2004.239750","url":null,"abstract":"This paper presents the design and implementation of an integrated low-voltage power conversion controller capable of delivering MOSFET gate-drive signals to on-chip power transistors with precision timing. Analog dead-time-locked-loops (DTLL) are used to realize an accurate analog deadtime controller with fast error rejection in a fixed frequency zero-voltage-switching quasi-square-wave (ZVS-QSW) buck converter.","PeriodicalId":303825,"journal":{"name":"2004 Proceedings of the 16th International Symposium on Power Semiconductor Devices and ICs","volume":"50 4 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2004-05-24","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115816437","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Progress in power ICs and MEMS, \"analog\" technologies to interface the real world","authors":"C. Contiero, B. Murari, B. Vigna","doi":"10.1109/ISPSD.2004.1332843","DOIUrl":"https://doi.org/10.1109/ISPSD.2004.1332843","url":null,"abstract":"The dramatic progress in integrated circuit technology has led to a huge increase of achievable digital computing power not accompanied by a parallel evolution in the capability to interface to the real world which is \"analog\" and not digital. This capability is fundamental in many products and represents the driving force in their evolution. Technologies like bipolar-CMOS-DMOS (BCD), available for many years to realize power ICs, appear to be more suitable than the pure CMOS to play the role of building analog interfaces. An emerging frontier of analog interfaces is represented by micro electro mechanical systems (MEMS) where the manufacturing technology developed in many years of microelectronics is being applied to micro-machined silicon, creating new solutions that combine electrical, mechanical, fluidic and optical elements. In this paper, an overview of BCD technology trends and of new applications of MEMS devices is examined.","PeriodicalId":303825,"journal":{"name":"2004 Proceedings of the 16th International Symposium on Power Semiconductor Devices and ICs","volume":"157 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2004-05-24","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131579885","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"1500 V and 10 A SiC motor drive inverter module","authors":"H. R. Chang, E. Hanna, Q. Zhang, M. Gomez","doi":"10.1109/WCT.2004.240150","DOIUrl":"https://doi.org/10.1109/WCT.2004.240150","url":null,"abstract":"This paper reports the design, fabrication, and electrical performance of 1500 V SiC MOS-enhanced JFETs and a SiC inverter module with a power rating of 1500 V and 10A using SiC Schottky diodes as the free wheeling diode (FWD). The static and dynamic characterization of 1500 V SiC MOS-enhanced JFETs and SiC Schottky FWDs were performed and packaged into phase leg inverter modules. A demonstration of a 1500 V and 10 A SiC inverter module in a motor drive at bus voltage of 600 V was successfully implemented. This is the highest bus voltage reported on SiC inverter modules.","PeriodicalId":303825,"journal":{"name":"2004 Proceedings of the 16th International Symposium on Power Semiconductor Devices and ICs","volume":"33 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2004-05-24","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131588699","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Influence of high dv/dt switching on a motor drive system: a practical solution to EMI issues","authors":"H. Akagi","doi":"10.1109/WCT.2004.239866","DOIUrl":"https://doi.org/10.1109/WCT.2004.239866","url":null,"abstract":"This paper deals with electromagnetic interference (EMI) issues inherent in adjustable-speed motor drive systems. The EMI issues mainly stem from a step-like change in the common-mode voltage appearing at the output terminals of a voltage-source pulse-width-modulation (PWM) inverter. This paper describes a small-sized passive EMI filter as a practical solution to the EMI issues, along with its operating principles and performance.","PeriodicalId":303825,"journal":{"name":"2004 Proceedings of the 16th International Symposium on Power Semiconductor Devices and ICs","volume":"40 6","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2004-05-24","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"133174880","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}