{"title":"Predicting large-signal CML gate delay using Y-Parameters for fast process optimization","authors":"S. Shankar, W. van Noort, J. Cressler","doi":"10.1109/BCTM.2013.6798177","DOIUrl":"https://doi.org/10.1109/BCTM.2013.6798177","url":null,"abstract":"A Y-Parameter based Figure-of-Merit (FoM) is proposed that can accurately predict large-signal Current-Mode Logic (CML) gate delay from small-signal S-parameter simulations/measurements. A differential-mode (DM) half circuit of an emitter-coupled differential pair with resistive load is used as the small-signal building block. The FoM is applied to various collector current (IC) and load resistor (RL) combinations obtained from the power-delay curve of a prototype SiGe technology platform. Results of the FoM delay predictions are compared with ring oscillator gate delays. A small-signal model parameter based equation is also proposed that provides physical insight into the components that contribute to the overall CML delay.","PeriodicalId":272941,"journal":{"name":"2013 IEEE Bipolar/BiCMOS Circuits and Technology Meeting (BCTM)","volume":"15 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2013-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"116161023","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"A compact, transformer-based 60 GHz SPDT RF switch utilizing diode-connected SiGe HBTs","authors":"R. Schmid, P. Song, J. Cressler","doi":"10.1109/BCTM.2013.6798156","DOIUrl":"https://doi.org/10.1109/BCTM.2013.6798156","url":null,"abstract":"This work describes the design of a compact 60 GHz SPDT RF switch utilizing diode-connected SiGe HBTs. At mm-wave frequencies, SiGe HBTs demonstrate better Roff/Ron ratios than CMOS and can be used to improve switch performance. A switch topology using a transformer is developed to create a SPDT with a small foot print of 190 μm × 225 μm. The transformer design is discussed and a methodology is presented to optimize the matching components of the switch. The switch is fabricated on a 180 nm SiGe BiCMOS technology platform featuring HBTs with an fT/fmax of 240/260 GHz. The switch achieves 2.7 dB insertion loss and 14 dB isolation at 60 GHz with a P1dB and IIP3 of 13.8 dBm and 23.8 dBm, respectively. This represents a 20% improvement in insertion loss in comparison to a similar 90 nm CMOS switch at 50 GHz. It is also shown that the proposed switch can help enable built-in-self-test (BIST) functionality for transmit-receive modules.","PeriodicalId":272941,"journal":{"name":"2013 IEEE Bipolar/BiCMOS Circuits and Technology Meeting (BCTM)","volume":"12 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2013-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124483924","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
B. Sheinman, R. Carmon, R. Ben-Yishay, O. Katz, N. Mazor, Run Levinger, D. Elad, A. Golberg, A. Bruetbart
{"title":"A double balanced 81–86GHz EBAND active down conversion mixer in SiGe technology","authors":"B. Sheinman, R. Carmon, R. Ben-Yishay, O. Katz, N. Mazor, Run Levinger, D. Elad, A. Golberg, A. Bruetbart","doi":"10.1109/BCTM.2013.6798171","DOIUrl":"https://doi.org/10.1109/BCTM.2013.6798171","url":null,"abstract":"An RF to IF down-conversion mixer for the upper 81-86GHz E-BAND frequency range was designed and fabricated in IBM 0.12μm SiGe technology. The Mixer comprises of a double balanced Gilbert-cell in which the RF signal is driven through a marchand balun into the common base amplifying mixer stage. The mixer exhibits conversion gain of 7dB, SSB noise figure of 12dB and input compression I1dBCP of -10dBm. The low noise figure and high conversion gain of the mixer enables the addition of a highly linear analog controlled attenuator between the mixer and LNA to further improve the linearity of the receiver chain without degrading the noise performance. The mixer area is 0.4mm2 and it consumes 110mW from a 2.7V power supply.","PeriodicalId":272941,"journal":{"name":"2013 IEEE Bipolar/BiCMOS Circuits and Technology Meeting (BCTM)","volume":"43 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2013-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"130842072","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
V. Jain, B. Zetterlund, P. Cheng, R. Camillo-Castillo, J. Pekarik, J. Adkisson, Qizhi Z. Liu, P. Gray, V. Kaushal, T. Kessler, D. Harame
{"title":"Study of mutual and self-thermal resistance in 90nm SiGe HBTs","authors":"V. Jain, B. Zetterlund, P. Cheng, R. Camillo-Castillo, J. Pekarik, J. Adkisson, Qizhi Z. Liu, P. Gray, V. Kaushal, T. Kessler, D. Harame","doi":"10.1109/BCTM.2013.6798134","DOIUrl":"https://doi.org/10.1109/BCTM.2013.6798134","url":null,"abstract":"Impact of mutual thermal coupling on the performance of a single 90nm SiGe heterojunction bipolar transistor (HBT) due to the presence of power dissipating elements like other HBTs in near vicinity is presented in this paper. Mutual thermal resistance (Rth,mutual) has been computed as a function of spacing between the single HBT and a ring of HBTs surrounding the device. HBT structural design variations including device layout schemes, metal wire stack connected to the emitter, deep trench (DT) depth and emitter to DT spacing, for reduced self thermal resistance (Rth), have been explored in this paper. An updated thermal resistance model accounting for the heat flow through the metal wiring stack connected to the emitter is also reported.","PeriodicalId":272941,"journal":{"name":"2013 IEEE Bipolar/BiCMOS Circuits and Technology Meeting (BCTM)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2013-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"130932150","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"GaN for automotive applications","authors":"Koichi Nishikawa","doi":"10.1109/BCTM.2013.6798163","DOIUrl":"https://doi.org/10.1109/BCTM.2013.6798163","url":null,"abstract":"Many power switching devices are used in a hybrid vehicle (HV) and an electric vehicle (EV) systems. For future development of the HV/EV, higher performances than that of Si power devices, for example, low on-resistance, high speed, high operation temperature, are strongly required. GaN power devices are promising candidate for the requirements. Power modules used in HV/EV system and present status of the GaN power device development are presented. Reliability of the GaN power device was also discussed.","PeriodicalId":272941,"journal":{"name":"2013 IEEE Bipolar/BiCMOS Circuits and Technology Meeting (BCTM)","volume":"107 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2013-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"125096717","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
M. Yanagisawa, Masataka Watanabe, T. Kawasaki, Hirohiko Kobayashi, K. Kotani, R. Yamabi, Y. Tosaka, D. Fukushi
{"title":"Highly-reliable and reproducible InGaAs/InP double heterojunction bipolar transistor utilizing all-wet etching process for triple mesa formation","authors":"M. Yanagisawa, Masataka Watanabe, T. Kawasaki, Hirohiko Kobayashi, K. Kotani, R. Yamabi, Y. Tosaka, D. Fukushi","doi":"10.1109/BCTM.2013.6798153","DOIUrl":"https://doi.org/10.1109/BCTM.2013.6798153","url":null,"abstract":"The authors have succeeded in making a robust fabrication process applied to InP-based double heterojunction bipolar transistors. The process, featuring all-wet etching method for formation of triple-mesa structure, has shown markedly high reproducibility and reliability. The variation of the current gain has been 4.6% through 130 wafers, and the mean time to failure at the junction temperature of 100°C has been longer than 4 × 106 hours, whose criterion is a 5% change in current gain. These excellent results show that our structure of DHBT, which has an InP passivation layer on the surface of the base layer, and our all-wet mesa formation process, are sufficient to be applied to the manufacturing of integrated circuits.","PeriodicalId":272941,"journal":{"name":"2013 IEEE Bipolar/BiCMOS Circuits and Technology Meeting (BCTM)","volume":"42 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2013-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"133274908","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"A low-phase-noise monolithically integrated 60 GHz push-push VCO for 122 GHz applications in a SiGe bipolar technology","authors":"A. Chakraborty, S. Trotta, R. Weigel","doi":"10.1109/BCTM.2013.6798174","DOIUrl":"https://doi.org/10.1109/BCTM.2013.6798174","url":null,"abstract":"This paper presents a 60 GHz push-push VCO fabricated in an automotive qualified SiGe:C bipolar production technology with an ft of 170 GHz and fmax of 250 GHz. The VCO uses an AC coupled varactor and features a transmission line based biasing scheme for the varactor to improve the phase noise. The VCO can be tuned from 58.2 GHz to 63 GHz and achieves a minimum phase noise of -108 dBc/Hz at 1 MHz offset. The phase noise remains below -105 dBc/Hz over the entire tuning range. The VCO consumes 145 mW from a 3.3 V power supply.","PeriodicalId":272941,"journal":{"name":"2013 IEEE Bipolar/BiCMOS Circuits and Technology Meeting (BCTM)","volume":"9 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2013-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"127998635","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
R. Camillo-Castillo, Q. Liu, J. Adkisson, M. Khater, P. Gray, V. Jain, R. Leidy, J. Pekarik, J. Gambino, B. Zetterlund, C. Willets, C. Parrish, S. Engelmann, A. Pyzyna, P. Cheng, D. Harame
{"title":"SiGe HBTs in 90nm BiCMOS technology demonstrating 300GHz/420GHz fT/fMAX through reduced Rb and Ccb parasitics","authors":"R. Camillo-Castillo, Q. Liu, J. Adkisson, M. Khater, P. Gray, V. Jain, R. Leidy, J. Pekarik, J. Gambino, B. Zetterlund, C. Willets, C. Parrish, S. Engelmann, A. Pyzyna, P. Cheng, D. Harame","doi":"10.1109/BCTM.2013.6798182","DOIUrl":"https://doi.org/10.1109/BCTM.2013.6798182","url":null,"abstract":"Scaling both the fT and the fMAX of SiGe HBTs is quite challenging due to the opposing physical device requirements for improving these figures of merit. In this paper, millisecond anneal techniques, low temperature silicide and low temperature contact processes are shown to be effective in reducing the base resistance. These processes when combined with a novel approach to address the collector-base capacitance are shown to produce high performance SiGe HBT devices which demonstrate operating frequencies of 300/420GHz fT/fMAX. This is the first report of 90nm SiGe BICMOS with an fMAX exceeding 400GHz.","PeriodicalId":272941,"journal":{"name":"2013 IEEE Bipolar/BiCMOS Circuits and Technology Meeting (BCTM)","volume":"13 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2013-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"116806442","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
M. Wingender, F. Bore, N. Chantier, A. Glascott-Jones, E. Bouin, J. Amblard
{"title":"10 Bit and 12 Bit data conversion achievements at microwave frequencies on 200GHz SiGeC (Bipolar) and 120GHz 0.18µm BiCMOS technology","authors":"M. Wingender, F. Bore, N. Chantier, A. Glascott-Jones, E. Bouin, J. Amblard","doi":"10.1109/BCTM.2013.6798143","DOIUrl":"https://doi.org/10.1109/BCTM.2013.6798143","url":null,"abstract":"This paper describes design techniques for Bipolar and BiCMOS analog circuits. Comparison on such performances as transconductance, speed, matching, noise of bipolar and CMOS transistors are reviewed and compared. Design achievements such as a single core 12 Bit 1.5GS/s Analog to Digital Converter (ADC) [1] and a single core 12 Bit 3GS/s Digital to Analog Converters (DAC) [2] based on a fully bipolar 200GHz SiGeC technology are introduced to illustrate the advantages and drawbacks of a fully bipolar technology for high speed data converters. A Quad 10 Bit 5GS/s ADC based on 4 interleaved ADC Core designed with a 120 GHz 0.18um BiCMOS technology is also presented, to illustrate the advantages brought by the combination of Bipolar and CMOS technologies.","PeriodicalId":272941,"journal":{"name":"2013 IEEE Bipolar/BiCMOS Circuits and Technology Meeting (BCTM)","volume":"9 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2013-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131842621","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
J. Bardin, Prasana Ravindran, Su-Wei Chang, Raghavan Kumar, J. Stern, M. Shaw, D. Russell, W. Farr
{"title":"A high-speed cryogenic SiGe channel combiner IC for large photon-starved SNSPD arrays","authors":"J. Bardin, Prasana Ravindran, Su-Wei Chang, Raghavan Kumar, J. Stern, M. Shaw, D. Russell, W. Farr","doi":"10.1109/BCTM.2013.6798179","DOIUrl":"https://doi.org/10.1109/BCTM.2013.6798179","url":null,"abstract":"In this paper, the design and characterization of a cryogenic eight-channel pixel combiner circuit designed to readout superconducting nanowire single photon detectors (SNSPDs) is presented. The circuit is designed to amplify, digitize, edge detect, and combine the output signals of an array of eight SNSPDs. The design has been enabled by the development of novel large-signal cryogenic HBT simulation models. The circuit has been fabricated and measurement results demonstrate excellent agreement with simulation.","PeriodicalId":272941,"journal":{"name":"2013 IEEE Bipolar/BiCMOS Circuits and Technology Meeting (BCTM)","volume":"123 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2013-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131187683","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}