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2013 IEEE Bipolar/BiCMOS Circuits and Technology Meeting (BCTM)最新文献

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A scalable model for temperature dependent thermal resistance of SiGe HBTs SiGe HBTs温度相关热阻的可扩展模型
2013 IEEE Bipolar/BiCMOS Circuits and Technology Meeting (BCTM) Pub Date : 2013-09-01 DOI: 10.1109/BCTM.2013.6798137
A. Sahoo, S. Frégonèse, M. Weiss, C. Maneux, T. Zimmer
{"title":"A scalable model for temperature dependent thermal resistance of SiGe HBTs","authors":"A. Sahoo, S. Frégonèse, M. Weiss, C. Maneux, T. Zimmer","doi":"10.1109/BCTM.2013.6798137","DOIUrl":"https://doi.org/10.1109/BCTM.2013.6798137","url":null,"abstract":"This paper presents a geometry scalable approach for temperature dependent thermal resistance (RTH) calculations in trench-isolated SiGe heterojunction bipolar transistors (HBTs). The model is able to predict the RTH at any temperature and power dissipation (Pdiss). The temperature dependency is obtained by discretizing the heat flow region into n-number of elementary slices depending on the temperature gradient. RTHs of each slice are calculated using temperature dependent thermal conductivity. The results are compared to 3D thermal TCAD simulations for a wide range of ambient temperature (Tamb), Pdiss and device dimensions. Finally, the scalability is validated through measurements of several transistor geometries as well as two different technologies and found to be in good agreement.","PeriodicalId":272941,"journal":{"name":"2013 IEEE Bipolar/BiCMOS Circuits and Technology Meeting (BCTM)","volume":"76 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2013-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"130971076","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 13
AlN thin-film deposition for suppressing surface current losses in RF circuits on high-resistivity silicon 抑制射频电路中高电阻硅表面电流损耗的AlN薄膜沉积
2013 IEEE Bipolar/BiCMOS Circuits and Technology Meeting (BCTM) Pub Date : 2013-09-01 DOI: 10.1109/BCTM.2013.6798148
S. Evseev, L. Nanver, S. Milosavljevic
{"title":"AlN thin-film deposition for suppressing surface current losses in RF circuits on high-resistivity silicon","authors":"S. Evseev, L. Nanver, S. Milosavljevic","doi":"10.1109/BCTM.2013.6798148","DOIUrl":"https://doi.org/10.1109/BCTM.2013.6798148","url":null,"abstract":"Thin aluminum nitride (AlN) films, deposited by means of Physical Vapor Deposition (PVD) to a thickness up to 200 nm, are studied as RF passivation layers for transmission lines High Resistivity Silicon (HRS) substrates. Excellent passivation properties are demonstrated by measuring RF losses on coplanar waveguides (CPWs) as well as the space-charge-layer sheet resistance (SCL-RSH) on specially designed MISFET structures. Compared to oxide interfaces the losses go from a strongly bias-dependent ~ 10 dB/cm to a bias-independent 1.7 dB/cm for the AlN:Si interfacial layer, corresponding to an increase of SCL-RSH from ~ 104 Ω/□ to 107 Ω/□. The results suggest that a high resistive AlN:Si layer is formed by interdiffusion of the AlN and underlying Si which then conducts the parasitic interface currents.","PeriodicalId":272941,"journal":{"name":"2013 IEEE Bipolar/BiCMOS Circuits and Technology Meeting (BCTM)","volume":"103 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2013-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124803785","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 4
100Gbit/s SiGe Clock and Data Recovery 100Gbit/s SiGe时钟和数据恢复
2013 IEEE Bipolar/BiCMOS Circuits and Technology Meeting (BCTM) Pub Date : 2013-09-01 DOI: 10.1109/BCTM.2013.6798175
Q. Beraud-Sudreau, J. Bégueret, O. Mazouffre, M. Pignol, L. Baguena, C. Neveu, Y. Deval, T. Taris
{"title":"100Gbit/s SiGe Clock and Data Recovery","authors":"Q. Beraud-Sudreau, J. Bégueret, O. Mazouffre, M. Pignol, L. Baguena, C. Neveu, Y. Deval, T. Taris","doi":"10.1109/BCTM.2013.6798175","DOIUrl":"https://doi.org/10.1109/BCTM.2013.6798175","url":null,"abstract":"Clock and data recovery (CDR) is the first logical block in serial data receiver and the latter performances depend on the CDR ones. In this paper, a 100 Gbit/s CDR designed in 130 nm BiCMOS SiGe process is presented. The CDR uses an Injection Locked Oscillator (ILO) and a feedback loop to lock the data and the clock in frequency and phase. The power consumption is 1.4 W under 2.3 V power supply.","PeriodicalId":272941,"journal":{"name":"2013 IEEE Bipolar/BiCMOS Circuits and Technology Meeting (BCTM)","volume":"413 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2013-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122799914","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
Optimization of Horizontal Current Bipolar Transistor (HCBT) technology parameters for linearity in RF mixer 射频混频器中线性度的水平电流双极晶体管(HCBT)技术参数优化
2013 IEEE Bipolar/BiCMOS Circuits and Technology Meeting (BCTM) Pub Date : 2013-09-01 DOI: 10.1109/BCTM.2013.6798133
T. Suligoj, M. Koričić, J. Žilak, H. Mochizuki, S. Morita, K. Shinomura, H. Imai
{"title":"Optimization of Horizontal Current Bipolar Transistor (HCBT) technology parameters for linearity in RF mixer","authors":"T. Suligoj, M. Koričić, J. Žilak, H. Mochizuki, S. Morita, K. Shinomura, H. Imai","doi":"10.1109/BCTM.2013.6798133","DOIUrl":"https://doi.org/10.1109/BCTM.2013.6798133","url":null,"abstract":"Double-balanced active mixer based on a Gilbert cell is designed and fabricated as the first RF circuit in Horizontal Current Bipolar Transistor (HCBT) technology. The maximum IIP3 of 17.7 dBm at mixer current of 9.2 mA and conversion gain of -5 dB are achieved. Three different HCBT structures are used in a mixer design to examine the effect of process parameters on mixer linearity. The main effect on the linearity has the n-collector doping profile since it governs the onset of Kirk effect. The improvement of 6 dB in IIP3 can be achieved by using the optimum HCBT structure, if switching quad transistors operate at or near the high current region. The circuit model parameters of three HCBT structures are extracted, accurately reproducing the measured device and circuit data.","PeriodicalId":272941,"journal":{"name":"2013 IEEE Bipolar/BiCMOS Circuits and Technology Meeting (BCTM)","volume":"66 6 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2013-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115106377","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 7
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