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2014 29th Symposium on Microelectronics Technology and Devices (SBMicro)最新文献

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Dependence of the optimum length of light doped region of GC SOI nMOSFET with front gate bias GC - SOI nMOSFET最佳掺光区长度与正极偏压的关系
2014 29th Symposium on Microelectronics Technology and Devices (SBMicro) Pub Date : 2014-10-30 DOI: 10.1109/SBMICRO.2014.6940099
R. Assalti, M. Pavanello, D. Flandre, M. de Souza
{"title":"Dependence of the optimum length of light doped region of GC SOI nMOSFET with front gate bias","authors":"R. Assalti, M. Pavanello, D. Flandre, M. de Souza","doi":"10.1109/SBMICRO.2014.6940099","DOIUrl":"https://doi.org/10.1109/SBMICRO.2014.6940099","url":null,"abstract":"This work assesses the analog performance of Graded-Channel FD SOI nMOSFET transistors regarding the dependence of gate voltage overdrive over the length of lightly doped region which maximizes the intrinsic voltage gain, unit gain frequency and breakdown voltage. It is shown that the optimum length of lightly doped region depends on the target application of GC devices.","PeriodicalId":244987,"journal":{"name":"2014 29th Symposium on Microelectronics Technology and Devices (SBMicro)","volume":"10 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2014-10-30","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"121933705","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Enabling III–V integrated photonics with Er-doped Al2O3 films 用掺铒Al2O3薄膜实现III-V集成光子
2014 29th Symposium on Microelectronics Technology and Devices (SBMicro) Pub Date : 2014-10-30 DOI: 10.1109/SBMICRO.2014.6940104
P. Jarschel, M. C. M. M. Souza, A. V. Von Zuben, A. C. Ramos, R. B. Merlo, N. Frateschi
{"title":"Enabling III–V integrated photonics with Er-doped Al2O3 films","authors":"P. Jarschel, M. C. M. M. Souza, A. V. Von Zuben, A. C. Ramos, R. B. Merlo, N. Frateschi","doi":"10.1109/SBMICRO.2014.6940104","DOIUrl":"https://doi.org/10.1109/SBMICRO.2014.6940104","url":null,"abstract":"We describe the integration of erbium-doped Al2O3 material with InGaAs/GaAs quantum well lasers emitting at 980 nm, demonstrating the possibility of integrating III-V based pumping lasers and materials suitable for optical amplification and planar photonics. Combining Er-doped materials with III-V compounds is challenging since ion activation usually requires high temperature annealing. In order to demonstrate the compatibility of the two material systems we fabricated laser samples using Er-doped Al2O3 films as insulating material. We compare annealed (800°C) and non-annealed devices and show that laser performance is not affected by the high-temperature annealing.","PeriodicalId":244987,"journal":{"name":"2014 29th Symposium on Microelectronics Technology and Devices (SBMicro)","volume":"22 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2014-10-30","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"125047691","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 4
Silicon film thickness influence on enhanced dynamic threshold UTBB SOI nMOSFETs 硅膜厚度对增强动态阈值UTBB SOI nmosfet的影响
2014 29th Symposium on Microelectronics Technology and Devices (SBMicro) Pub Date : 2014-10-30 DOI: 10.1109/SBMICRO.2014.6940089
K. Sasaki, M. Aoulaiche, E. Simoen, C. Claeys, J. Martino
{"title":"Silicon film thickness influence on enhanced dynamic threshold UTBB SOI nMOSFETs","authors":"K. Sasaki, M. Aoulaiche, E. Simoen, C. Claeys, J. Martino","doi":"10.1109/SBMICRO.2014.6940089","DOIUrl":"https://doi.org/10.1109/SBMICRO.2014.6940089","url":null,"abstract":"This paper investigates the silicon film thickness influence on extensionless Ultra Thin Body and Buried Oxide (UTBB) FDSOI devices applied in a dynamic threshold voltage (DT2) operation (VB=VG) over the conventional one (VB=0V). A 6nm silicon thickness in enhanced DT (eDT), where the back gate bias is a multiple value of the front gate one (VB=k×VG), was also considered and compared to the other configurations and to a 14nm silicon film. The better coupling of a thinner silicon film leads to superior DC parameters like lower subthreshold swing and DIBL, while the thicker device presents a higher gmmax and lower GIDL. Regarding the eDT performance, the parameters of the thinner channel vary less than for the thicker one.","PeriodicalId":244987,"journal":{"name":"2014 29th Symposium on Microelectronics Technology and Devices (SBMicro)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2014-10-30","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122823522","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 6
Microlenses and photodetectors integration for augmenting photocurrent 用于增强光电流的微透镜和光电探测器集成
2014 29th Symposium on Microelectronics Technology and Devices (SBMicro) Pub Date : 2014-10-30 DOI: 10.1109/SBMICRO.2014.6940110
J. M. Gomes, R. Rocha, J. Correia, J. Carmo
{"title":"Microlenses and photodetectors integration for augmenting photocurrent","authors":"J. M. Gomes, R. Rocha, J. Correia, J. Carmo","doi":"10.1109/SBMICRO.2014.6940110","DOIUrl":"https://doi.org/10.1109/SBMICRO.2014.6940110","url":null,"abstract":"This paper presents two approaches in microlenses (MLs) and photodiodes (PDs) integration for improving the light-photocurrent conversion. The first one consists in fabricating MLs with AZ4562 photoresist on a glass substrate: The integration of MLs with a focal length of 170 μm on a 150 μm thickness glass substrate aligned on top of a 240 μm square CMOS photodiode resulted in a decrease of ≈38% for the light-current conversion under white light. In the second approach the MLs were fabricated also with AZ4562 in 24-5 μm width-thickness (at the apex) on top of a 240 μm and 24 μm square CMOS photodiodes. The results showed an increase in light-current conversion in both cases: The 240 μm photodiode presented an increase of ≈2.6% and ≈5.2% under white and red light respectively, while the 24 μm photodiode presented an increase of ≈2.3% and ≈14.5% also under white and red light respectively.","PeriodicalId":244987,"journal":{"name":"2014 29th Symposium on Microelectronics Technology and Devices (SBMicro)","volume":"46 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2014-10-30","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122811770","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Drain induced barrier thinning on TFETs with different source/drain engineering 不同漏源/漏源工程对tfet的漏致阻挡变薄影响
2014 29th Symposium on Microelectronics Technology and Devices (SBMicro) Pub Date : 2014-10-30 DOI: 10.1109/SBMICRO.2014.6940092
M. D. V. Martino, J. Martino, P. Agopian
{"title":"Drain induced barrier thinning on TFETs with different source/drain engineering","authors":"M. D. V. Martino, J. Martino, P. Agopian","doi":"10.1109/SBMICRO.2014.6940092","DOIUrl":"https://doi.org/10.1109/SBMICRO.2014.6940092","url":null,"abstract":"The goal of this work is to study the effect of high drain voltage bias on short channel devices of tunnel field effect transistors (TFETs). This work will analyze the drain induced barrier thinning (DIBT) calculated for devices with different source and drain engineering, varying characteristics such as channel length, junction doping abruptness and drain/channel junction gate underlap. The first part of this work explained the phenomenon based on Energy Band Diagrams and revealed the effect on transfer characteristic curves. In the second part, the DIBT has been chosen as a relevant parameter, since it includes the threshold voltage susceptibility to the bias conditions, which is important for both analog and digital applications. Finally, plotting DIBT for each parameter variation, it was noticed that devices with Gaussian doping profile and lower drain/channel junction gate underlap tend to present better results in terms of DIBT. The suitability of TFETs has been discussed based on these results.","PeriodicalId":244987,"journal":{"name":"2014 29th Symposium on Microelectronics Technology and Devices (SBMicro)","volume":"2 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2014-10-30","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115311544","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 21
Multi-Chip Module (MCM-D) using thin film technology 多芯片模块(MCM-D)采用薄膜技术
2014 29th Symposium on Microelectronics Technology and Devices (SBMicro) Pub Date : 2014-10-30 DOI: 10.1109/SBMICRO.2014.6940122
C. B. Adamo, A. Flacker, Wilson J. Freitas, R. C. Teixeira, Michele O. da Silva, A. Rotondaro
{"title":"Multi-Chip Module (MCM-D) using thin film technology","authors":"C. B. Adamo, A. Flacker, Wilson J. Freitas, R. C. Teixeira, Michele O. da Silva, A. Rotondaro","doi":"10.1109/SBMICRO.2014.6940122","DOIUrl":"https://doi.org/10.1109/SBMICRO.2014.6940122","url":null,"abstract":"This work presents results of the Multi-Chip Module-Deposited technology built with thin film processes over a substrate of alumina and oxidized silicon that was used to micro-fabricate passive components (capacitors, resistors, inductors). Metal layers were deposited by sputtering, electrolytic and electroless techniques and benzocyclobutene was used as dielectric. Electrical characteristics of passive components and filters were evaluated indicating that the testchip and processes were effective to manufacture the devices.","PeriodicalId":244987,"journal":{"name":"2014 29th Symposium on Microelectronics Technology and Devices (SBMicro)","volume":"25 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2014-10-30","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124741883","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 6
360-nm SOI process development for high-T applications in harsh environments 针对恶劣环境下高t应用的360纳米SOI工艺开发
2014 29th Symposium on Microelectronics Technology and Devices (SBMicro) Pub Date : 2014-10-30 DOI: 10.1109/SBMICRO.2014.6940115
Edval J. P. Santos, H. M. Vasconcelos
{"title":"360-nm SOI process development for high-T applications in harsh environments","authors":"Edval J. P. Santos, H. M. Vasconcelos","doi":"10.1109/SBMICRO.2014.6940115","DOIUrl":"https://doi.org/10.1109/SBMICRO.2014.6940115","url":null,"abstract":"Silicon-On-Insulator, SOI, is specially suited for radiation-hard, high-temperature, and high-frequency circuitry. The development of a 360-nm SOI fabrication process is presented. The minimum feature size is selected, as a compromise between ease of fabrication and to allow for the fabrication of RF circuits. The process flow, mask design, lithography, and dimensional characterization results are discussed. The target substrate is an SOI wafer with high resistivity base wafer. For the process development, e-beam lithography is used in all lithographic steps for flexibility. PMMA is used as positive resist, and SU-8 is used as negative resist. The die size is 500 μm × 500 μm. An EKV 2.6 MOSFET model for the developed process was created. The target is the fabrication of 3D integrated smart sensor for harsh environments, such as: on-engine, wheel mounted, and oil & gas production.","PeriodicalId":244987,"journal":{"name":"2014 29th Symposium on Microelectronics Technology and Devices (SBMicro)","volume":"45 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2014-10-30","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"121976259","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 2
Field emission enhancement achieved by selective multi-walled carbon nanotubes deposition over silicon microstructures 选择性多壁碳纳米管沉积在硅微结构上实现场发射增强
2014 29th Symposium on Microelectronics Technology and Devices (SBMicro) Pub Date : 2014-10-30 DOI: 10.1109/SBMICRO.2014.6940094
M. Dantas, E. Galeazzo, H. Peres, F. J. Ramirez-Fernandez
{"title":"Field emission enhancement achieved by selective multi-walled carbon nanotubes deposition over silicon microstructures","authors":"M. Dantas, E. Galeazzo, H. Peres, F. J. Ramirez-Fernandez","doi":"10.1109/SBMICRO.2014.6940094","DOIUrl":"https://doi.org/10.1109/SBMICRO.2014.6940094","url":null,"abstract":"Field Emission (FE) devices have been studied due to their attractive characteristics: they are cold cathode electron emitters, and can be used as ionization sources for several applications. However, miniaturization, emission efficiency, and integration with electronic circuits are aspects that need to be enhanced. This paper reports silicon (Si) FE devices successfully optimized by the combination of miniaturized structures and multi-walled carbon nanotubes (MWCNT). MWCNT were deposited over Si microtip arrays by electrophoretic deposition (EPD), and a selective coating without additional lithographic masks was achieved with appropriate process parameters. Our devices were electrically analyzed by means of macroscopic electric field (E), which demonstrated to be efficient for experimental performance comparison among samples. FE devices covered with CNT showed an E reduction up to 80% for a given current, which indicates a considerable enhancement in electron emission efficiency. We conclude that the appropriate combination of microstructures and CNT deposition parameters is suitable for the development of efficient and cost-effective integrated FE devices.","PeriodicalId":244987,"journal":{"name":"2014 29th Symposium on Microelectronics Technology and Devices (SBMicro)","volume":"50 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2014-10-30","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"116181470","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 2
The effects of scaling on Back End of Line Processing 缩放对线后端处理的影响
2014 29th Symposium on Microelectronics Technology and Devices (SBMicro) Pub Date : 2014-10-30 DOI: 10.1109/SBMICRO.2014.6940080
P. Verdonck, Christopher J. Wilson, L. Wen
{"title":"The effects of scaling on Back End of Line Processing","authors":"P. Verdonck, Christopher J. Wilson, L. Wen","doi":"10.1109/SBMICRO.2014.6940080","DOIUrl":"https://doi.org/10.1109/SBMICRO.2014.6940080","url":null,"abstract":"Back End of Line Processing has an ever increasing impact on the whole of integrated circuit manufacturing. Its influence on the delay of the signals is already for some nodes higher than the Front End of Line Processes. Besides, for the more advanced nodes, the back end cost will be as high or higher than the front end cost. The technological challenges are ever more difficult to meet, the red brick wall looms for different unit processes. In this paper, we'll review some of the most interesting issues that scaling is causing to Back End Of Line processing.","PeriodicalId":244987,"journal":{"name":"2014 29th Symposium on Microelectronics Technology and Devices (SBMicro)","volume":"34 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2014-10-30","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131078363","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 3
Hydrogen sensors with TiO2 nanotubes 带有TiO2纳米管的氢传感器
2014 29th Symposium on Microelectronics Technology and Devices (SBMicro) Pub Date : 2014-10-30 DOI: 10.1109/SBMICRO.2014.6940084
M. A. Rodini, C. Thiago, I. Pereyra, K. F. Albertin
{"title":"Hydrogen sensors with TiO2 nanotubes","authors":"M. A. Rodini, C. Thiago, I. Pereyra, K. F. Albertin","doi":"10.1109/SBMICRO.2014.6940084","DOIUrl":"https://doi.org/10.1109/SBMICRO.2014.6940084","url":null,"abstract":"Hydrogen sensors, intending to operate at low temperatures (around 25°C), based on TiO2 nanotube arrays were fabricated and characterized in N2/H2 atmosphere with different nitrogen concentrations. The nanotube arrays were obtained through Ti anodic oxidation in a NH4F in ethylene glycol (0, 5 % in weight) and 2 % H2O bath, magnetically stirred at room temperature. The TiO2 nanotube hydrogen sensors were characterized at room temperature with hydrogen concentration varying from 50 to 4000 ppm. A linear conductance variation between 50 and 500 ppm was observed. This result is very attractive for hydrogen sensors where low operation temperatures are needed, for example, in medical applications.","PeriodicalId":244987,"journal":{"name":"2014 29th Symposium on Microelectronics Technology and Devices (SBMicro)","volume":"32 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2014-10-30","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"132414162","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
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