GC - SOI nMOSFET最佳掺光区长度与正极偏压的关系

2014 29th Symposium on Microelectronics Technology and Devices (SBMicro) Pub Date : 2014-10-30 DOI:10.1109/SBMICRO.2014.6940099

R. Assalti, M. Pavanello, D. Flandre, M. de Souza

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引用次数: 0

摘要

本研究评估了梯度通道FD SOI nMOSFET晶体管的模拟性能，考虑了栅极电压过驱动对轻掺杂区域长度的依赖性，从而使固有电压增益、单位增益频率和击穿电压最大化。结果表明，轻掺杂区域的最佳长度取决于气相色谱器件的目标应用。

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Dependence of the optimum length of light doped region of GC SOI nMOSFET with front gate bias

This work assesses the analog performance of Graded-Channel FD SOI nMOSFET transistors regarding the dependence of gate voltage overdrive over the length of lightly doped region which maximizes the intrinsic voltage gain, unit gain frequency and breakdown voltage. It is shown that the optimum length of lightly doped region depends on the target application of GC devices.

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2014 29th Symposium on Microelectronics Technology and Devices (SBMicro)

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