Silicon film thickness influence on enhanced dynamic threshold UTBB SOI nMOSFETs

K. Sasaki, M. Aoulaiche, E. Simoen, C. Claeys, J. Martino
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引用次数: 6

Abstract

This paper investigates the silicon film thickness influence on extensionless Ultra Thin Body and Buried Oxide (UTBB) FDSOI devices applied in a dynamic threshold voltage (DT2) operation (VB=VG) over the conventional one (VB=0V). A 6nm silicon thickness in enhanced DT (eDT), where the back gate bias is a multiple value of the front gate one (VB=k×VG), was also considered and compared to the other configurations and to a 14nm silicon film. The better coupling of a thinner silicon film leads to superior DC parameters like lower subthreshold swing and DIBL, while the thicker device presents a higher gmmax and lower GIDL. Regarding the eDT performance, the parameters of the thinner channel vary less than for the thicker one.
硅膜厚度对增强动态阈值UTBB SOI nmosfet的影响
本文研究了在动态阈值电压(DT2)下(VB=VG)应用于无延伸超薄体和埋藏氧化物(UTBB) FDSOI器件的硅膜厚度对动态阈值电压(VB=0V)的影响。还考虑了增强DT (eDT)中6nm硅厚度,其中后门偏置是前门偏置的倍数(VB=k×VG),并将其与其他配置和14nm硅膜进行了比较。越薄的硅膜耦合越好,器件的亚阈值摆幅和DIBL等直流参数越好,而越厚的器件gmmax越高,GIDL越低。对于eDT性能,较薄通道的参数变化小于较厚通道。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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