K. Sasaki, M. Aoulaiche, E. Simoen, C. Claeys, J. Martino
{"title":"Silicon film thickness influence on enhanced dynamic threshold UTBB SOI nMOSFETs","authors":"K. Sasaki, M. Aoulaiche, E. Simoen, C. Claeys, J. Martino","doi":"10.1109/SBMICRO.2014.6940089","DOIUrl":null,"url":null,"abstract":"This paper investigates the silicon film thickness influence on extensionless Ultra Thin Body and Buried Oxide (UTBB) FDSOI devices applied in a dynamic threshold voltage (DT2) operation (VB=VG) over the conventional one (VB=0V). A 6nm silicon thickness in enhanced DT (eDT), where the back gate bias is a multiple value of the front gate one (VB=k×VG), was also considered and compared to the other configurations and to a 14nm silicon film. The better coupling of a thinner silicon film leads to superior DC parameters like lower subthreshold swing and DIBL, while the thicker device presents a higher gmmax and lower GIDL. Regarding the eDT performance, the parameters of the thinner channel vary less than for the thicker one.","PeriodicalId":244987,"journal":{"name":"2014 29th Symposium on Microelectronics Technology and Devices (SBMicro)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2014-10-30","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"6","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2014 29th Symposium on Microelectronics Technology and Devices (SBMicro)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/SBMICRO.2014.6940089","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 6
Abstract
This paper investigates the silicon film thickness influence on extensionless Ultra Thin Body and Buried Oxide (UTBB) FDSOI devices applied in a dynamic threshold voltage (DT2) operation (VB=VG) over the conventional one (VB=0V). A 6nm silicon thickness in enhanced DT (eDT), where the back gate bias is a multiple value of the front gate one (VB=k×VG), was also considered and compared to the other configurations and to a 14nm silicon film. The better coupling of a thinner silicon film leads to superior DC parameters like lower subthreshold swing and DIBL, while the thicker device presents a higher gmmax and lower GIDL. Regarding the eDT performance, the parameters of the thinner channel vary less than for the thicker one.