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2015 22nd International Workshop on Active-Matrix Flatpanel Displays and Devices (AM-FPD)最新文献

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Hybrid-type temperature sensor using thin-film transistors generating rectangle output waveform 采用薄膜晶体管产生矩形输出波形的混合型温度传感器
2015 22nd International Workshop on Active-Matrix Flatpanel Displays and Devices (AM-FPD) Pub Date : 2015-07-01 DOI: 10.1109/AM-FPD.2015.7173221
Hisashi Hayashi, Katsuya Kito, Shuhei Kitajima, T. Matsuda, M. Kimura
{"title":"Hybrid-type temperature sensor using thin-film transistors generating rectangle output waveform","authors":"Hisashi Hayashi, Katsuya Kito, Shuhei Kitajima, T. Matsuda, M. Kimura","doi":"10.1109/AM-FPD.2015.7173221","DOIUrl":"https://doi.org/10.1109/AM-FPD.2015.7173221","url":null,"abstract":"We have developed a hybrid-type temperature sensor using thin-film transistors generating rectangle output waveform. The advantages of the hybrid-type temperature sensor are that the large temperature dependence of the off-leakage current can be utilized, and simultaneously only a digital circuit is required to count the digital pulse. However, the conventional hybrid-type sensor has a disadvantage that the pulse width is too small to count. Therefore, we have developed a new hybrid-type temperature sensor in order to enlarge the pulse width. We confirmed the working by circuit simulation.","PeriodicalId":243757,"journal":{"name":"2015 22nd International Workshop on Active-Matrix Flatpanel Displays and Devices (AM-FPD)","volume":"32 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2015-07-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124961281","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 2
Zn(O,S) buffer layers grown by atomic layer deposition in Cu2ZnSn(S,Se)4 thin film solar cells Cu2ZnSn(S,Se)4薄膜太阳能电池原子层沉积制备Zn(O,S)缓冲层
2015 22nd International Workshop on Active-Matrix Flatpanel Displays and Devices (AM-FPD) Pub Date : 2015-07-01 DOI: 10.1109/AM-FPD.2015.7173241
Hee Kyeung Hong, Inyoung Kim, Hui Kyung Park, Jaeseung Jo, Gwang Yeom Song, J. H. Kim, Jaeyeong Heo
{"title":"Zn(O,S) buffer layers grown by atomic layer deposition in Cu2ZnSn(S,Se)4 thin film solar cells","authors":"Hee Kyeung Hong, Inyoung Kim, Hui Kyung Park, Jaeseung Jo, Gwang Yeom Song, J. H. Kim, Jaeyeong Heo","doi":"10.1109/AM-FPD.2015.7173241","DOIUrl":"https://doi.org/10.1109/AM-FPD.2015.7173241","url":null,"abstract":"A solar cell is an electrical device that converts light energy into electricity. One of the crucial parts of realizing high-performance thin-film-based solar cells is an n-type buffer layer. Instead of the widely used, but toxic CdS buffer layer, we investigated the possibility of using Zn(O,S) as an alternative material grown by atomic layer deposition (ALD). First of all, structural, electrical, chemical, and optical properties of Zn(O,S) thin films were studied. In addition, this new buffer layer was applied for earth-abundant Cu2ZnSn(S,Se)4 solar cells and the highest power-conversion efficiency (PCE, η) of ~2.7% was achieved by optimizing oxygen-to-sulfur (O/S) ratio.","PeriodicalId":243757,"journal":{"name":"2015 22nd International Workshop on Active-Matrix Flatpanel Displays and Devices (AM-FPD)","volume":"81 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2015-07-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"130396792","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Temperature dependences of conductivity in undoped and doped poly-Si thin films grown on YSZ crystallization-induction layers by two-step irradiation method with pulsed laser 脉冲激光两步辐照法在YSZ晶化感应层上生长的未掺杂和掺杂多si薄膜电导率的温度依赖性
2015 22nd International Workshop on Active-Matrix Flatpanel Displays and Devices (AM-FPD) Pub Date : 2015-07-01 DOI: 10.1109/AM-FPD.2015.7173249
Mai Lien Thi Kieu, S. Horita
{"title":"Temperature dependences of conductivity in undoped and doped poly-Si thin films grown on YSZ crystallization-induction layers by two-step irradiation method with pulsed laser","authors":"Mai Lien Thi Kieu, S. Horita","doi":"10.1109/AM-FPD.2015.7173249","DOIUrl":"https://doi.org/10.1109/AM-FPD.2015.7173249","url":null,"abstract":"Conductivities of Si thin films crystallized in solid phase with/without YSZ layers by the two-step method with pulsed laser were investigated. The temperature dependences were also measured for both undoped and P-doped films using AC Hall effect measurement. It was found that the Si/YSZ/glass structure exhibited higher conductivities than those of the Si/glass. This suggested that the Si film crystallized on the YSZ layer is more suitable for application of electronic devices, compared with the Si film on glass.","PeriodicalId":243757,"journal":{"name":"2015 22nd International Workshop on Active-Matrix Flatpanel Displays and Devices (AM-FPD)","volume":"144 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2015-07-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129823547","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
A combinatorial device analysis method of oxide thin-film transistors 氧化薄膜晶体管组合器件分析方法
2015 22nd International Workshop on Active-Matrix Flatpanel Displays and Devices (AM-FPD) Pub Date : 2015-07-01 DOI: 10.1109/AM-FPD.2015.7173252
S. Jeon
{"title":"A combinatorial device analysis method of oxide thin-film transistors","authors":"S. Jeon","doi":"10.1109/AM-FPD.2015.7173252","DOIUrl":"https://doi.org/10.1109/AM-FPD.2015.7173252","url":null,"abstract":"Defects at the interface as well as in the bulk of semiconductor of oxide thin film transistor are the major concern for the successful development of oxide thin-film devices since it governs initial transistor performance and reliability characteristics such as hysteresis and stress induced Vth shift. Once the oxide semiconductor is integrated in the device structures, the quality of oxide semiconductor and surrounding media could only be characterized by seeming information such as drive current, mobility, sub-threshold slope and hysteresis. Here we present a combinatorial device analysis method using pulsed I-V, transient I-V and low frequency noise measurement methods to assess the quality of oxide device. In this presentation, we will deal with various oxide thin-film transistors such as HfInZnO (HIZO) device with metal cation contents, HIZO-IZO bi-layer device and HIZO device with gate insulator quality. Via pulsed I-V measurement method, we found that conventional DC measurement method significantly underestimate the performance of oxide devices. Using a short pulse I-V analysis, the trapping time constants were identified. The charge trapping phenomena were verified by low frequency noise measurements. This combinatorial method can be an effective way to improve reliability characteristics of oxide devices as it provides an accurate and quantitative way to assess the quality of device.","PeriodicalId":243757,"journal":{"name":"2015 22nd International Workshop on Active-Matrix Flatpanel Displays and Devices (AM-FPD)","volume":"92 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2015-07-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124599321","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Unseeded growth of poly-crystalline Ge with (111) surface orientation on insulator by pulsed green laser annealing 脉冲绿色激光退火在绝缘体上生长具有(111)表面取向的多晶锗
2015 22nd International Workshop on Active-Matrix Flatpanel Displays and Devices (AM-FPD) Pub Date : 2015-07-01 DOI: 10.1149/07510.0087ECST
M. Horita, Toru Takao, Yoshiaki Nieda, Y. Ishikawa, N. Sasaki, Y. Uraoka
{"title":"Unseeded growth of poly-crystalline Ge with (111) surface orientation on insulator by pulsed green laser annealing","authors":"M. Horita, Toru Takao, Yoshiaki Nieda, Y. Ishikawa, N. Sasaki, Y. Uraoka","doi":"10.1149/07510.0087ECST","DOIUrl":"https://doi.org/10.1149/07510.0087ECST","url":null,"abstract":"This paper describes unseeded growth of poly-crystalline Ge with well-oriented large-size grains on insulator from amorphous Ge by scanning pulsed green laser annealing. The Ge was patterned to 2-μm-wide stripes and then annealed by laser irradiation. The annealed Ge stripes were crystallized with well-oriented (111) surface and the grain size was 2 μm wide and ~10 μm long, where the maximum length was 20 μm. The crystallization process was discussed from dependence of the laser fluence on the crystal properties of Ge stripes.","PeriodicalId":243757,"journal":{"name":"2015 22nd International Workshop on Active-Matrix Flatpanel Displays and Devices (AM-FPD)","volume":"41 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2015-07-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"121326792","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Nonvolatile memory performances of transparent and/or flexible memory thin-film transistors using IGZO channel and ZnO charge-trap layers 使用IGZO通道和ZnO电荷阱层的透明和/或柔性存储薄膜晶体管的非易失性存储性能
2015 22nd International Workshop on Active-Matrix Flatpanel Displays and Devices (AM-FPD) Pub Date : 2015-07-01 DOI: 10.1109/AM-FPD.2015.7173185
So-jung Kim, W. Lee, Sung‐Min Yoon
{"title":"Nonvolatile memory performances of transparent and/or flexible memory thin-film transistors using IGZO channel and ZnO charge-trap layers","authors":"So-jung Kim, W. Lee, Sung‐Min Yoon","doi":"10.1109/AM-FPD.2015.7173185","DOIUrl":"https://doi.org/10.1109/AM-FPD.2015.7173185","url":null,"abstract":"We proposed a transparent and/or flexible charge-trap-type memory thin film transistors (CTM-TFTs) with a top-gate structure composed of zinc-oxide (ZnO) charge-trap and In-Ga-Zn-O (IGZO) active channel layers. The memory on/off ratio higher than 7-orders-of magnitude was obtained for the fully transparent CTM-TFTs fabricated on glass substrates when the width and amplitude of program pulses were set as 500 ns and ±20 V, respectively. The nonvolatile memory behaviors was successfully confirmed for the memory window to be as wide as 25.8 V. Furthermore, the highly stable memory performance was also guaranteed even under the light illumination conditions using various wavelength in the visible range. The memory operations of the flexible CTM-TFTs prepared on plastic polyethylene naphthalate substrates will also be discussed at presentation.","PeriodicalId":243757,"journal":{"name":"2015 22nd International Workshop on Active-Matrix Flatpanel Displays and Devices (AM-FPD)","volume":"76 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2015-07-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"130837611","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Suppression of positive gate bias temperature stress and negative gate bias illumination stress induced degradations by fluorine-passivated In-Ga-Zn-O thin-film transistors 氟钝化In-Ga-Zn-O薄膜晶体管抑制正栅极偏置温度应力和负栅极偏置照明应力引起的退化
2015 22nd International Workshop on Active-Matrix Flatpanel Displays and Devices (AM-FPD) Pub Date : 2015-07-01 DOI: 10.1109/AM-FPD.2015.7173255
Dapeng Wang, Jingxin Jiang, M. Furuta
{"title":"Suppression of positive gate bias temperature stress and negative gate bias illumination stress induced degradations by fluorine-passivated In-Ga-Zn-O thin-film transistors","authors":"Dapeng Wang, Jingxin Jiang, M. Furuta","doi":"10.1109/AM-FPD.2015.7173255","DOIUrl":"https://doi.org/10.1109/AM-FPD.2015.7173255","url":null,"abstract":"High-performance and highly-stable fluorine-passivated In-Ga-Zn-O (IGZO) thin-film transistor (TFT) was demonstrated by the formation of a fluorinated silicon nitride (SiNx:F) passivation layer. After annealing at 350 °C for 3 h, the IGZO TFT exhibited the great electrical properties, such as a field-effect mobility of 14.7 cm2 V-1 s-1, a subthreshold swing of 0.19, and a hysteresis of 0.02 V. Compare to the TFT with SiOx passivation, the reliability of TFT with SiNx:F passivation under positive gate bias temperature stress (PBTS) was significantly improved even at a stress temperature of 100 °C. In addition, the negative gate bias illumination stress (NBIS), which is a serious drawback for oxide TFTs, could be suppressed by the fluorine-passivated IGZO TFT.","PeriodicalId":243757,"journal":{"name":"2015 22nd International Workshop on Active-Matrix Flatpanel Displays and Devices (AM-FPD)","volume":"215 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2015-07-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"116907863","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Effects of over-etching time on the characteristics of amorphous IGZO thin-film transistors with back-channel-etch structure 过刻蚀时间对反沟道刻蚀非晶IGZO薄膜晶体管特性的影响
2015 22nd International Workshop on Active-Matrix Flatpanel Displays and Devices (AM-FPD) Pub Date : 2015-07-01 DOI: 10.1109/AM-FPD.2015.7173211
Guoying Wang, Zhen Song, Xiang Xiao, Shengdong Zhang
{"title":"Effects of over-etching time on the characteristics of amorphous IGZO thin-film transistors with back-channel-etch structure","authors":"Guoying Wang, Zhen Song, Xiang Xiao, Shengdong Zhang","doi":"10.1109/AM-FPD.2015.7173211","DOIUrl":"https://doi.org/10.1109/AM-FPD.2015.7173211","url":null,"abstract":"Dry-etch for patterning Mo source/drain electrodes directly on amorphous indium-gallium-zinc-oxide (a-IGZO) thin-film transistors (TFTs) with back-channel-etch (BCE) structure was investigated. The over-etching time of reactive ion etching (RIE) had a great influence on the performance of the BCE a-IGZO TFTs. The a-IGZO TFTs with an appropriate over-etching time, such as 20s, was observed with a field effect mobility (μFE) of 6.51 cm2/V·s, a threshold voltage (VTH) of 0.38 V, a subthreshold swing (SS) of 0.39 V/Dec and an Ion/Ioff current ratio of 109 even when the channel length L decreased to as small as 5 μm. The BCE a-IGZO TFT also showed a good electrical stability with VTH shift of 1.09V and -0.77V under positive and negative gate bias stress, respectively.","PeriodicalId":243757,"journal":{"name":"2015 22nd International Workshop on Active-Matrix Flatpanel Displays and Devices (AM-FPD)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2015-07-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129668287","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 3
Improvement of learning efficiency in neural network using poly-Si TFTs by synapse TFTs with LDD structure 利用LDD结构的突触tft提高神经网络学习效率
2015 22nd International Workshop on Active-Matrix Flatpanel Displays and Devices (AM-FPD) Pub Date : 2015-07-01 DOI: 10.1109/AM-FPD.2015.7173224
Ryohei Morita, Y. Maeda, T. Matsuda, M. Kimura
{"title":"Improvement of learning efficiency in neural network using poly-Si TFTs by synapse TFTs with LDD structure","authors":"Ryohei Morita, Y. Maeda, T. Matsuda, M. Kimura","doi":"10.1109/AM-FPD.2015.7173224","DOIUrl":"https://doi.org/10.1109/AM-FPD.2015.7173224","url":null,"abstract":"We are developing device-level neural networks using poly-Si TFTs. We succeeded in dramatically reducing the number of transistors in neurons and synapses to integrate a lot of devices, and we also succeeded in actually checking the operation of learning of logics. In this presentation, for the purpose of improvement of learning efficiency, we changed the synapse TFTs from the SD structure to the LDD structure. As a result, we succeeded in improving the learning efficiency by a 5×5 neural network.","PeriodicalId":243757,"journal":{"name":"2015 22nd International Workshop on Active-Matrix Flatpanel Displays and Devices (AM-FPD)","volume":"55 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2015-07-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"121178064","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Flexible substrates and non-ITO transparent electrodes for organic electronics 有机电子学用柔性衬底和非ito透明电极
2015 22nd International Workshop on Active-Matrix Flatpanel Displays and Devices (AM-FPD) Pub Date : 2015-07-01 DOI: 10.1109/AM-FPD.2015.7173183
M. Koden
{"title":"Flexible substrates and non-ITO transparent electrodes for organic electronics","authors":"M. Koden","doi":"10.1109/AM-FPD.2015.7173183","DOIUrl":"https://doi.org/10.1109/AM-FPD.2015.7173183","url":null,"abstract":"Flexible substrates and non-ITO transparent electrodes are key technologies for next generation organic electronics. In “Yamagata University Organic Thin Film Device Consortium”, in which 21 companies participate, flexible substrates and non-ITO transparent electrodes for organic electronics are being developed. This paper reviews the developed technologies and the prototype OLED devices.","PeriodicalId":243757,"journal":{"name":"2015 22nd International Workshop on Active-Matrix Flatpanel Displays and Devices (AM-FPD)","volume":"22 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2015-07-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"126502090","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
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