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2019 IEEE BiCMOS and Compound semiconductor Integrated Circuits and Technology Symposium (BCICTS)最新文献

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Graded-Channel GaN-Based HEMTs for High Linearity Amplifiers at Millimeter-Wave 用于毫米波高线性放大器的梯度通道氮化镓hemt
2019 IEEE BiCMOS and Compound semiconductor Integrated Circuits and Technology Symposium (BCICTS) Pub Date : 2019-11-01 DOI: 10.1109/BCICTS45179.2019.8972753
N. Venkatesan, Gerardo Silva-Oelker, P. Fay
{"title":"Graded-Channel GaN-Based HEMTs for High Linearity Amplifiers at Millimeter-Wave","authors":"N. Venkatesan, Gerardo Silva-Oelker, P. Fay","doi":"10.1109/BCICTS45179.2019.8972753","DOIUrl":"https://doi.org/10.1109/BCICTS45179.2019.8972753","url":null,"abstract":"Linearity in low-noise amplifiers is critical for high-performance mm-wave systems. While GaN-based HEMTs offer excellent survivability and noise figure, conventional AlGaN/GaN device designs exhibit only modest linearity. The use of graded-channel structures is promising for increasing the linearity figure of merit, OIP3/PDC, to 20 dB or more. We report simulation studies for further enhancement in linearity performance. By combining non-linear channel compositional grading with the parallel connection of multiple transistors for third-order transconductance cancellation, a further increase of 7 dB in linearity figure of merit beyond that experimentally demonstrated for linearly-graded channel devices is projected.","PeriodicalId":243314,"journal":{"name":"2019 IEEE BiCMOS and Compound semiconductor Integrated Circuits and Technology Symposium (BCICTS)","volume":"29 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2019-11-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"117247403","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 4
BCICTS 2019 Committees
2019 IEEE BiCMOS and Compound semiconductor Integrated Circuits and Technology Symposium (BCICTS) Pub Date : 2019-11-01 DOI: 10.1109/bcicts45179.2019.8972764
{"title":"BCICTS 2019 Committees","authors":"","doi":"10.1109/bcicts45179.2019.8972764","DOIUrl":"https://doi.org/10.1109/bcicts45179.2019.8972764","url":null,"abstract":"","PeriodicalId":243314,"journal":{"name":"2019 IEEE BiCMOS and Compound semiconductor Integrated Circuits and Technology Symposium (BCICTS)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2019-11-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129353988","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Monte Carlo Investigation of Traveling Accumulation Layers in InP Heterojunction Bipolar Transistor Power Amplifiers InP异质结双极晶体管功率放大器中行积累层的蒙特卡罗研究
2019 IEEE BiCMOS and Compound semiconductor Integrated Circuits and Technology Symposium (BCICTS) Pub Date : 2019-11-01 DOI: 10.1109/BCICTS45179.2019.8972778
Jonathan P. Sculley, B. Markman, Utku Soylu, Yihao Fang, M. Urteaga, A. Carter, M. Rodwell, P. Yoder
{"title":"Monte Carlo Investigation of Traveling Accumulation Layers in InP Heterojunction Bipolar Transistor Power Amplifiers","authors":"Jonathan P. Sculley, B. Markman, Utku Soylu, Yihao Fang, M. Urteaga, A. Carter, M. Rodwell, P. Yoder","doi":"10.1109/BCICTS45179.2019.8972778","DOIUrl":"https://doi.org/10.1109/BCICTS45179.2019.8972778","url":null,"abstract":"We report Monte Carlo simulation results of 300nm InP heterojunction bipolar transistors driven to exhibit distortion. IM3 distortion is typically explained by collector velocity modulation. Full-band ensemble Monte Carlo simulations implicate intervalley transfer as an additional source of distortion under conditions of high current, low voltage, and high doping. Simulations reveal that intervalley transfer promotes the formation of traveling accumulation domains which result in high frequency distortion more significant than that caused by velocity modulation. Special care must be taken when designing high current HBT power amplifiers in order to mitigate this effect.","PeriodicalId":243314,"journal":{"name":"2019 IEEE BiCMOS and Compound semiconductor Integrated Circuits and Technology Symposium (BCICTS)","volume":"200 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2019-11-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124493520","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Feasibility Study of InAlN/GaN HEMT for sub-6 GHz Band Applications 低于6 GHz频段应用的InAlN/GaN HEMT可行性研究
2019 IEEE BiCMOS and Compound semiconductor Integrated Circuits and Technology Symposium (BCICTS) Pub Date : 2019-11-01 DOI: 10.1109/BCICTS45179.2019.8972761
Kazutaka Inoue, K. Sugawara, K. Kikuchi, I. Makabe, Hiroshi Yamamoto
{"title":"Feasibility Study of InAlN/GaN HEMT for sub-6 GHz Band Applications","authors":"Kazutaka Inoue, K. Sugawara, K. Kikuchi, I. Makabe, Hiroshi Yamamoto","doi":"10.1109/BCICTS45179.2019.8972761","DOIUrl":"https://doi.org/10.1109/BCICTS45179.2019.8972761","url":null,"abstract":"This paper describes the high breakdown voltage InAlN HEMT development and the possibility of InAlN HEMT to lower frequency range, including 5G sub-6 GHz band applications. The developed InAlN barrier HEMT with GaN cap layer was successfully suppressed the gate leakage current of 1 x 10-4A/mm at the gate to drain bias of -100 V. The load-pull measurement clarified the superior efficiency of the developed InAlN HEMT by 3 points, which is attributed to the sharper knee profile by utilizing higher sheet electron density of InAlN/GaN interface.","PeriodicalId":243314,"journal":{"name":"2019 IEEE BiCMOS and Compound semiconductor Integrated Circuits and Technology Symposium (BCICTS)","volume":"116 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2019-11-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124049229","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
Coherent Transceiver for High Speed Optical Communications: Opportunities and Challenges 高速光通信相干收发器:机遇与挑战
2019 IEEE BiCMOS and Compound semiconductor Integrated Circuits and Technology Symposium (BCICTS) Pub Date : 2019-11-01 DOI: 10.1109/BCICTS45179.2019.8972714
S. Blais, Y. Greshishchev, P. Schvan, I. Betty, D. McGhan
{"title":"Coherent Transceiver for High Speed Optical Communications: Opportunities and Challenges","authors":"S. Blais, Y. Greshishchev, P. Schvan, I. Betty, D. McGhan","doi":"10.1109/BCICTS45179.2019.8972714","DOIUrl":"https://doi.org/10.1109/BCICTS45179.2019.8972714","url":null,"abstract":"With the emergence of new markets for coherent optical transponders, new challenges need to be addressed. Coherent optical modems have fast become the standard transport solution in the telecommunications industry for medium and long reach applications and are gaining momentum in shorter reach applications. In this paper, we highlight some of the technical challenges stemming from the different application spaces and how the requirements from each market segment will affect the design of subcomponents of optical transponders, in particular for analog electronics and for optical components and sub-assemblies. In particular, we will present how key technologies such as CMOS, Bi-CMOS, III-V and Silicon Photonics (SiP) will help alleviate some of the system-level challenges.","PeriodicalId":243314,"journal":{"name":"2019 IEEE BiCMOS and Compound semiconductor Integrated Circuits and Technology Symposium (BCICTS)","volume":"17 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2019-11-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"132306325","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 4
A High Efficiency, Ka-Band, GaN-on-SiC MMIC with Low Compression 一种高效率、ka波段、低压缩GaN-on-SiC MMIC
2019 IEEE BiCMOS and Compound semiconductor Integrated Circuits and Technology Symposium (BCICTS) Pub Date : 2019-11-01 DOI: 10.1109/BCICTS45179.2019.8972749
B. Schmukler, J. Barner, J. Fisher, D. Gajewski, S. Sheppard, J. Milligan, K. Bothe, S. Ganguly, T. Alcorn, Jennifer Gao, Chris Hardiman, E. Jones, D. Namishia, F. Radulescu
{"title":"A High Efficiency, Ka-Band, GaN-on-SiC MMIC with Low Compression","authors":"B. Schmukler, J. Barner, J. Fisher, D. Gajewski, S. Sheppard, J. Milligan, K. Bothe, S. Ganguly, T. Alcorn, Jennifer Gao, Chris Hardiman, E. Jones, D. Namishia, F. Radulescu","doi":"10.1109/BCICTS45179.2019.8972749","DOIUrl":"https://doi.org/10.1109/BCICTS45179.2019.8972749","url":null,"abstract":"The design and performance of a 28 V, 3-stage, Ka-band, GaN-on-SiC, power amplifier MMIC with high efficiency and low gain compression are presented. At 30 GHz, the MMIC provides saturated power of 37.6 dBm with an associated PAE of 39.8%. P1dB is within 1 dB of saturated power over the 26.5-30.5 GHz band. At 30 GHz, P1dB is 37.1 dBm with an associated PAE of 37.8%. In addition, the MMIC has a low quiescent bias of 72 mA.","PeriodicalId":243314,"journal":{"name":"2019 IEEE BiCMOS and Compound semiconductor Integrated Circuits and Technology Symposium (BCICTS)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2019-11-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"132867989","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 6
A Broadband Logarithmic Power Detector Using 130 nm SiGe BiCMOS Technology 采用130 nm SiGe BiCMOS技术的宽带对数功率检测器
2019 IEEE BiCMOS and Compound semiconductor Integrated Circuits and Technology Symposium (BCICTS) Pub Date : 2019-11-01 DOI: 10.1109/BCICTS45179.2019.8972724
Yunyi Gong, Seokchul Lee, Hanbin Ying, Anup P. Omprakash, E. Gebara, Huifang Gu, Charles Nicholls, J. Cressler
{"title":"A Broadband Logarithmic Power Detector Using 130 nm SiGe BiCMOS Technology","authors":"Yunyi Gong, Seokchul Lee, Hanbin Ying, Anup P. Omprakash, E. Gebara, Huifang Gu, Charles Nicholls, J. Cressler","doi":"10.1109/BCICTS45179.2019.8972724","DOIUrl":"https://doi.org/10.1109/BCICTS45179.2019.8972724","url":null,"abstract":"This work presents the design of a broadband logarithmic (log) power detector implemented using 130 nm SiGe BiCMOS technology. The proposed log detector uses a pair of common-emitter SiGe HBTs for sensing, and a log amplifier stage is employed to achieve linear-in-dB transfer characteristic. The log detector shows 23 dB dynamic range with -28 dBm minimum input power from 2 GHz to 40 GHz with ±1.5 dB log error. The design consumes 3.2 mW of static DC power with a 2-V supply and consumes less than 7.8 mW of DC power over the input power range. A two-branch log detector design consisting of two identical parallel log detectors with modified output stage is also presented. The two-branch log detector demonstrates 47 dB dynamic range with minimum input power of -53 dBm at 10 GHz with ±1.5 dB log error, with an externally introduced 25 dB power level offset between the inputs of the two branches.","PeriodicalId":243314,"journal":{"name":"2019 IEEE BiCMOS and Compound semiconductor Integrated Circuits and Technology Symposium (BCICTS)","volume":"66 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2019-11-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"133506007","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 4
A 16-dBm D-Band Power Amplifier with a Cascaded CE and CB Output Power Stage Using a Stub Matching Topology 采用存根匹配拓扑的级联CE和CB输出功率级的16dbm d波段功率放大器
2019 IEEE BiCMOS and Compound semiconductor Integrated Circuits and Technology Symposium (BCICTS) Pub Date : 2019-11-01 DOI: 10.1109/BCICTS45179.2019.8972772
Badou Sene, H. Knapp, Hao Li, Jonas Kammerer, S. Majied, K. Aufinger, J. Fritzin, Daniel Reiter, N. Pohl
{"title":"A 16-dBm D-Band Power Amplifier with a Cascaded CE and CB Output Power Stage Using a Stub Matching Topology","authors":"Badou Sene, H. Knapp, Hao Li, Jonas Kammerer, S. Majied, K. Aufinger, J. Fritzin, Daniel Reiter, N. Pohl","doi":"10.1109/BCICTS45179.2019.8972772","DOIUrl":"https://doi.org/10.1109/BCICTS45179.2019.8972772","url":null,"abstract":"This work presents the design of a power amplifier (PA) with an AC-coupled common-emitter and common-base stage in a 130 nm SiGe BiCMOS technology. The amplifier operates in the D-band and consists of two driving stages followed by an output power stage. At 143 GHz a small signal gain of 39.8 dB and a maximum saturated output power (PSAT) of 16 dBm is achieved. The PAE peak value is 5.4 %, while the chip draws 220 mA from a 3.3 V power supply. Including pads the chip consumes an area of 0.66 mm2. To the best of the authors’ knowledge this is the highest value for PSAT reported in this frequency range using silicon-based technologies.","PeriodicalId":243314,"journal":{"name":"2019 IEEE BiCMOS and Compound semiconductor Integrated Circuits and Technology Symposium (BCICTS)","volume":"128 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2019-11-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128200366","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 2
Characterization of the Self-Enhanced Class J PA Operating Mode in LDMOS and GaN Transistors LDMOS和GaN晶体管自增强J类PA工作模式的表征
2019 IEEE BiCMOS and Compound semiconductor Integrated Circuits and Technology Symposium (BCICTS) Pub Date : 2019-11-01 DOI: 10.1109/BCICTS45179.2019.8972741
F. Vanaverbeke, Michael Satinu, Kevin Kim
{"title":"Characterization of the Self-Enhanced Class J PA Operating Mode in LDMOS and GaN Transistors","authors":"F. Vanaverbeke, Michael Satinu, Kevin Kim","doi":"10.1109/BCICTS45179.2019.8972741","DOIUrl":"https://doi.org/10.1109/BCICTS45179.2019.8972741","url":null,"abstract":"The classical description of the Class J operating mode of RF power transistors, featuring a linear drainsource capacitance (CDS), predicts that maximum RF output power and efficiency are equal to what they are in Class B and that their values remain constant over the entire continuum from Class B to Class J and J*. However, harmonic load-pull measurements showed that both maximum RF output power and efficiency increase by up to 0.4dB and 16%points, respectively, in Class J. This trend was observed on both LDMOS and GaN devices, at any frequency and at any operating voltage. In previous work, we explained that this is thanks to the non-linearity of CDS. In this paper, we compare measured and simulated results of a Class BJ/BJ* characterization campaign of a 5mm LDMOS transistor at 2GHz and a 0.7mm GaN transistor at 4.7GHz and use their respective model’s non-linear CDS to understand its behavior as a second harmonic voltage source.","PeriodicalId":243314,"journal":{"name":"2019 IEEE BiCMOS and Compound semiconductor Integrated Circuits and Technology Symposium (BCICTS)","volume":"28 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2019-11-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115898723","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
25.78-Gbit/s Burst Mode TIA for 50G-EPON OLT 25.78 gbit /s突发模式TIA，用于50G-EPON OLT
2019 IEEE BiCMOS and Compound semiconductor Integrated Circuits and Technology Symposium (BCICTS) Pub Date : 2019-11-01 DOI: 10.1109/BCICTS45179.2019.8972748
Keiji Tanaka, N. Tanaka, S. Ogita
{"title":"25.78-Gbit/s Burst Mode TIA for 50G-EPON OLT","authors":"Keiji Tanaka, N. Tanaka, S. Ogita","doi":"10.1109/BCICTS45179.2019.8972748","DOIUrl":"https://doi.org/10.1109/BCICTS45179.2019.8972748","url":null,"abstract":"We report the circuit design of first 25G burst mode TIA in the world, fabricated by 0.13 μm SiGe:C BiCMOS (ft/fmax =300/500 GHz), and the evaluation results when used 25G-PIN- PD. We confirm excellent receiver sensitivities at BER=10-2 are - 20.2 dBm(OMA) for 25.78-Gbit/s and -23.2 dBm(ave) for 10.31Gbit/s, respectively. When we calculate equivalent performances when assumed 25G Ge/Si APD, these receiver sensitivities at BER=10-2 are equivalent to -29.7 dBm(OMA) for 25.78-Gbit/s and -32.3 dBm(ave) for 10.31-Gbit/s, respectively. The burst dynamic range (loud/soft ratio) to satisfy a post-FEC error condition is greater than 25 dB. We confirm excellent TIA performances that will enable a high power class OLT receiver in 50G-EPON in IEEE802.ca.","PeriodicalId":243314,"journal":{"name":"2019 IEEE BiCMOS and Compound semiconductor Integrated Circuits and Technology Symposium (BCICTS)","volume":"67 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2019-11-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114825516","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 2
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