A Broadband Logarithmic Power Detector Using 130 nm SiGe BiCMOS Technology

Yunyi Gong, Seokchul Lee, Hanbin Ying, Anup P. Omprakash, E. Gebara, Huifang Gu, Charles Nicholls, J. Cressler
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引用次数: 4

Abstract

This work presents the design of a broadband logarithmic (log) power detector implemented using 130 nm SiGe BiCMOS technology. The proposed log detector uses a pair of common-emitter SiGe HBTs for sensing, and a log amplifier stage is employed to achieve linear-in-dB transfer characteristic. The log detector shows 23 dB dynamic range with -28 dBm minimum input power from 2 GHz to 40 GHz with ±1.5 dB log error. The design consumes 3.2 mW of static DC power with a 2-V supply and consumes less than 7.8 mW of DC power over the input power range. A two-branch log detector design consisting of two identical parallel log detectors with modified output stage is also presented. The two-branch log detector demonstrates 47 dB dynamic range with minimum input power of -53 dBm at 10 GHz with ±1.5 dB log error, with an externally introduced 25 dB power level offset between the inputs of the two branches.
采用130 nm SiGe BiCMOS技术的宽带对数功率检测器
这项工作提出了一种采用130纳米SiGe BiCMOS技术实现的宽带对数(log)功率检测器的设计。所提出的日志检测器使用一对共发射极SiGe hbt进行传感,并使用一个日志放大器级来实现线性-in- db传输特性。日志检测器动态范围为23db,最小输入功率为- 28dbm,工作范围为2ghz ~ 40ghz,日志误差为±1.5 dB。该设计在2v电源下消耗3.2 mW的静态直流功率,在输入功率范围内消耗小于7.8 mW的直流功率。提出了一种双支路日志检测器的设计方案,该方案由两个相同的并行日志检测器组成,并改进了输出级。双支路对数检测器的动态范围为47 dB,在10 GHz时最小输入功率为-53 dBm,日志误差为±1.5 dB,两个支路输入之间外部引入25 dB功率电平偏移。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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