Yunyi Gong, Seokchul Lee, Hanbin Ying, Anup P. Omprakash, E. Gebara, Huifang Gu, Charles Nicholls, J. Cressler
{"title":"采用130 nm SiGe BiCMOS技术的宽带对数功率检测器","authors":"Yunyi Gong, Seokchul Lee, Hanbin Ying, Anup P. Omprakash, E. Gebara, Huifang Gu, Charles Nicholls, J. Cressler","doi":"10.1109/BCICTS45179.2019.8972724","DOIUrl":null,"url":null,"abstract":"This work presents the design of a broadband logarithmic (log) power detector implemented using 130 nm SiGe BiCMOS technology. The proposed log detector uses a pair of common-emitter SiGe HBTs for sensing, and a log amplifier stage is employed to achieve linear-in-dB transfer characteristic. The log detector shows 23 dB dynamic range with -28 dBm minimum input power from 2 GHz to 40 GHz with ±1.5 dB log error. The design consumes 3.2 mW of static DC power with a 2-V supply and consumes less than 7.8 mW of DC power over the input power range. A two-branch log detector design consisting of two identical parallel log detectors with modified output stage is also presented. The two-branch log detector demonstrates 47 dB dynamic range with minimum input power of -53 dBm at 10 GHz with ±1.5 dB log error, with an externally introduced 25 dB power level offset between the inputs of the two branches.","PeriodicalId":243314,"journal":{"name":"2019 IEEE BiCMOS and Compound semiconductor Integrated Circuits and Technology Symposium (BCICTS)","volume":"66 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2019-11-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"4","resultStr":"{\"title\":\"A Broadband Logarithmic Power Detector Using 130 nm SiGe BiCMOS Technology\",\"authors\":\"Yunyi Gong, Seokchul Lee, Hanbin Ying, Anup P. Omprakash, E. Gebara, Huifang Gu, Charles Nicholls, J. Cressler\",\"doi\":\"10.1109/BCICTS45179.2019.8972724\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"This work presents the design of a broadband logarithmic (log) power detector implemented using 130 nm SiGe BiCMOS technology. The proposed log detector uses a pair of common-emitter SiGe HBTs for sensing, and a log amplifier stage is employed to achieve linear-in-dB transfer characteristic. The log detector shows 23 dB dynamic range with -28 dBm minimum input power from 2 GHz to 40 GHz with ±1.5 dB log error. The design consumes 3.2 mW of static DC power with a 2-V supply and consumes less than 7.8 mW of DC power over the input power range. A two-branch log detector design consisting of two identical parallel log detectors with modified output stage is also presented. The two-branch log detector demonstrates 47 dB dynamic range with minimum input power of -53 dBm at 10 GHz with ±1.5 dB log error, with an externally introduced 25 dB power level offset between the inputs of the two branches.\",\"PeriodicalId\":243314,\"journal\":{\"name\":\"2019 IEEE BiCMOS and Compound semiconductor Integrated Circuits and Technology Symposium (BCICTS)\",\"volume\":\"66 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2019-11-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"4\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2019 IEEE BiCMOS and Compound semiconductor Integrated Circuits and Technology Symposium (BCICTS)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/BCICTS45179.2019.8972724\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2019 IEEE BiCMOS and Compound semiconductor Integrated Circuits and Technology Symposium (BCICTS)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/BCICTS45179.2019.8972724","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
A Broadband Logarithmic Power Detector Using 130 nm SiGe BiCMOS Technology
This work presents the design of a broadband logarithmic (log) power detector implemented using 130 nm SiGe BiCMOS technology. The proposed log detector uses a pair of common-emitter SiGe HBTs for sensing, and a log amplifier stage is employed to achieve linear-in-dB transfer characteristic. The log detector shows 23 dB dynamic range with -28 dBm minimum input power from 2 GHz to 40 GHz with ±1.5 dB log error. The design consumes 3.2 mW of static DC power with a 2-V supply and consumes less than 7.8 mW of DC power over the input power range. A two-branch log detector design consisting of two identical parallel log detectors with modified output stage is also presented. The two-branch log detector demonstrates 47 dB dynamic range with minimum input power of -53 dBm at 10 GHz with ±1.5 dB log error, with an externally introduced 25 dB power level offset between the inputs of the two branches.