{"title":"25.78 gbit /s突发模式TIA,用于50G-EPON OLT","authors":"Keiji Tanaka, N. Tanaka, S. Ogita","doi":"10.1109/BCICTS45179.2019.8972748","DOIUrl":null,"url":null,"abstract":"We report the circuit design of first 25G burst mode TIA in the world, fabricated by 0.13 μm SiGe:C BiCMOS (ft/fmax =300/500 GHz), and the evaluation results when used 25G-PIN- PD. We confirm excellent receiver sensitivities at BER=10-2 are - 20.2 dBm(OMA) for 25.78-Gbit/s and -23.2 dBm(ave) for 10.31Gbit/s, respectively. When we calculate equivalent performances when assumed 25G Ge/Si APD, these receiver sensitivities at BER=10-2 are equivalent to -29.7 dBm(OMA) for 25.78-Gbit/s and -32.3 dBm(ave) for 10.31-Gbit/s, respectively. The burst dynamic range (loud/soft ratio) to satisfy a post-FEC error condition is greater than 25 dB. We confirm excellent TIA performances that will enable a high power class OLT receiver in 50G-EPON in IEEE802.ca.","PeriodicalId":243314,"journal":{"name":"2019 IEEE BiCMOS and Compound semiconductor Integrated Circuits and Technology Symposium (BCICTS)","volume":"67 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2019-11-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"2","resultStr":"{\"title\":\"25.78-Gbit/s Burst Mode TIA for 50G-EPON OLT\",\"authors\":\"Keiji Tanaka, N. Tanaka, S. Ogita\",\"doi\":\"10.1109/BCICTS45179.2019.8972748\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"We report the circuit design of first 25G burst mode TIA in the world, fabricated by 0.13 μm SiGe:C BiCMOS (ft/fmax =300/500 GHz), and the evaluation results when used 25G-PIN- PD. We confirm excellent receiver sensitivities at BER=10-2 are - 20.2 dBm(OMA) for 25.78-Gbit/s and -23.2 dBm(ave) for 10.31Gbit/s, respectively. When we calculate equivalent performances when assumed 25G Ge/Si APD, these receiver sensitivities at BER=10-2 are equivalent to -29.7 dBm(OMA) for 25.78-Gbit/s and -32.3 dBm(ave) for 10.31-Gbit/s, respectively. The burst dynamic range (loud/soft ratio) to satisfy a post-FEC error condition is greater than 25 dB. We confirm excellent TIA performances that will enable a high power class OLT receiver in 50G-EPON in IEEE802.ca.\",\"PeriodicalId\":243314,\"journal\":{\"name\":\"2019 IEEE BiCMOS and Compound semiconductor Integrated Circuits and Technology Symposium (BCICTS)\",\"volume\":\"67 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2019-11-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"2\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2019 IEEE BiCMOS and Compound semiconductor Integrated Circuits and Technology Symposium (BCICTS)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/BCICTS45179.2019.8972748\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2019 IEEE BiCMOS and Compound semiconductor Integrated Circuits and Technology Symposium (BCICTS)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/BCICTS45179.2019.8972748","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
We report the circuit design of first 25G burst mode TIA in the world, fabricated by 0.13 μm SiGe:C BiCMOS (ft/fmax =300/500 GHz), and the evaluation results when used 25G-PIN- PD. We confirm excellent receiver sensitivities at BER=10-2 are - 20.2 dBm(OMA) for 25.78-Gbit/s and -23.2 dBm(ave) for 10.31Gbit/s, respectively. When we calculate equivalent performances when assumed 25G Ge/Si APD, these receiver sensitivities at BER=10-2 are equivalent to -29.7 dBm(OMA) for 25.78-Gbit/s and -32.3 dBm(ave) for 10.31-Gbit/s, respectively. The burst dynamic range (loud/soft ratio) to satisfy a post-FEC error condition is greater than 25 dB. We confirm excellent TIA performances that will enable a high power class OLT receiver in 50G-EPON in IEEE802.ca.