Extended Abstracts of International Workshop on Gate Insulator (IEEE Cat. No.03EX765)最新文献

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HfSiON gate dielectric for CMOS applications 用于CMOS应用的HfSiON栅极电介质
M. Takayanagi, T. Watanabe, R. Iijima, A. Kaneko, S. Inumiya, I. Hirano, K. Sekine, A. Nishiyama, K. Eguchi, Y. Tsunashima
{"title":"HfSiON gate dielectric for CMOS applications","authors":"M. Takayanagi, T. Watanabe, R. Iijima, A. Kaneko, S. Inumiya, I. Hirano, K. Sekine, A. Nishiyama, K. Eguchi, Y. Tsunashima","doi":"10.1109/IWGI.2003.159199","DOIUrl":"https://doi.org/10.1109/IWGI.2003.159199","url":null,"abstract":"In this paper, we review our results on HfSiON deposited by MOCVD. Characteristics of capacitors and FETs fabricated by the conventional poly-Si gate CMOS process are discussed. We cover the issues of flatband voltage shift, effective inversion-layer mobility in relation to fabrication method of HfSiON, design consideration of HfSiON for 50 nm CMOSFETs and dielectric reliability.","PeriodicalId":221442,"journal":{"name":"Extended Abstracts of International Workshop on Gate Insulator (IEEE Cat. No.03EX765)","volume":"187 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2003-12-19","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122377907","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 2
Advanced oxynitride gate dielectrics for CMOS applications 用于CMOS应用的先进氮化氧栅极电介质
J. Yugami, S. Tsujikawa, R. Tsuchiya, S. Saito, Y. Shimamoto, K. Torii, T. Mine, T. Onai
{"title":"Advanced oxynitride gate dielectrics for CMOS applications","authors":"J. Yugami, S. Tsujikawa, R. Tsuchiya, S. Saito, Y. Shimamoto, K. Torii, T. Mine, T. Onai","doi":"10.1109/IWGI.2003.159201","DOIUrl":"https://doi.org/10.1109/IWGI.2003.159201","url":null,"abstract":"A most preferable candidate of gate dielectrics in advanced CMOS to satisfy the requirement of an ITRS roadmap is still SiON, especially for high-performance and low-power devices. To advance the efficiency of SiON gate dielectrics, the keyword is N-rich. A high nitrogen concentration leads to low leakage current and high immunity to impurity penetration. However, in N-rich SiON, the mobility degradation and NBTI enhancement due to fixed charges formed by incorporated nitrogen atoms near the interface are problems. To solve these problems, we developed a SiN gate dielectric with an oxygen-enriched interface (OI-SiN). A process in which oxygen atoms are incorporated after forming SiN provides enhanced nitrogen concentration and an oxygen-enriched interface while simultaneously suppressing fixed charges, even in dielectrics having sub-nm EOT. This OI-SiN has good immunity against impurity penetration and provides superior device performance compared to the conventional SiON. Furthermore, the OI-SiN was much effective as an interfacial layer of high-K gate stack to solve problems in high-K gate dielectric.","PeriodicalId":221442,"journal":{"name":"Extended Abstracts of International Workshop on Gate Insulator (IEEE Cat. No.03EX765)","volume":"23 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2003-12-19","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124781259","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 3
Improvement in the uniformity and the thermal stability of Hf-silicate gate dielectric by plasma-nitridation 等离子体氮化改善硅酸铪栅极介质均匀性和热稳定性
S. Kamiyama, T. Aoyama, Y. Tsutsumi, H. Takada, A. Horiuchi, T. Maeda, K. Torii, H. Kitajima, T. Arikado
{"title":"Improvement in the uniformity and the thermal stability of Hf-silicate gate dielectric by plasma-nitridation","authors":"S. Kamiyama, T. Aoyama, Y. Tsutsumi, H. Takada, A. Horiuchi, T. Maeda, K. Torii, H. Kitajima, T. Arikado","doi":"10.1109/IWGI.2003.159180","DOIUrl":"https://doi.org/10.1109/IWGI.2003.159180","url":null,"abstract":"In this study, we used HfSiO/sub x/ with Hf concentration of 60% in order to obtain a EOT less than 1.5nm, and the influence of nitrogen concentration on the electrical properties was examined.","PeriodicalId":221442,"journal":{"name":"Extended Abstracts of International Workshop on Gate Insulator (IEEE Cat. No.03EX765)","volume":"6 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2003-12-19","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"130396785","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 6
Impacts of hole trapping on the NBTI degradation and recovery in PMOS devices 空穴捕获对PMOS器件中NBTI降解和恢复的影响
H. Lin, D. Lee, S.-C. Ou, C. Chien, T. Huang
{"title":"Impacts of hole trapping on the NBTI degradation and recovery in PMOS devices","authors":"H. Lin, D. Lee, S.-C. Ou, C. Chien, T. Huang","doi":"10.1109/IWGI.2003.159188","DOIUrl":"https://doi.org/10.1109/IWGI.2003.159188","url":null,"abstract":"In this paper, impacts of hole trapping on the negative bias temperature instability (NBTI) degradation and recovery in PMOS devices was investigated. Dual-gate p- and n-channel MOSFETs were fabricated using a standard CMOS twin-well technology.","PeriodicalId":221442,"journal":{"name":"Extended Abstracts of International Workshop on Gate Insulator (IEEE Cat. No.03EX765)","volume":"134 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2003-12-19","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123218272","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 5
Gate dielectrics on strained-Ge layers on Si/sub 1-x/Gex/Si virtual substrates Si/sub - 1-x/Gex/Si虚拟衬底上应变ge层的栅极介电体
S. Bhattacharya, J. Mccarthy, B. Armstrong, H. Gamble, G. Dalapati, S. Das, C. Maiti, T. Perova, A. Moore
{"title":"Gate dielectrics on strained-Ge layers on Si/sub 1-x/Gex/Si virtual substrates","authors":"S. Bhattacharya, J. Mccarthy, B. Armstrong, H. Gamble, G. Dalapati, S. Das, C. Maiti, T. Perova, A. Moore","doi":"10.1109/IWGI.2003.159181","DOIUrl":"https://doi.org/10.1109/IWGI.2003.159181","url":null,"abstract":"We report the deposition and physical characterization of Ge-rich layers on relaxed SiGe/Si using virtual substrate technology by low pressure chemical vapour deposition and formation of different gate dielectrics. Gate dielectrics such as GeO/sub 2/, GeO/sub x/N/sub y/ and high-k ZrO/sub 2/ have been grown using plasma enhanced chemical vapour deposition at 150/spl deg/C. MOS capacitors used in this study were fabricated directly on the Ge substrate and also the electrical characteristics were studied.","PeriodicalId":221442,"journal":{"name":"Extended Abstracts of International Workshop on Gate Insulator (IEEE Cat. No.03EX765)","volume":"56 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2003-12-19","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128201517","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
Effects of nitrogen incorporation HfAlOx films on gate leakage current from XPS study of Hf bonding states XPS研究Hf键态对HfAlOx膜栅漏电流的影响
T. Nishimura, K. Iwamoto, K. Tominaga, T. Yasuda, W. Mizubayashi, S. Fujii, T. Nabatame, A. Toriumi
{"title":"Effects of nitrogen incorporation HfAlOx films on gate leakage current from XPS study of Hf bonding states","authors":"T. Nishimura, K. Iwamoto, K. Tominaga, T. Yasuda, W. Mizubayashi, S. Fujii, T. Nabatame, A. Toriumi","doi":"10.1109/IWGI.2003.159208","DOIUrl":"https://doi.org/10.1109/IWGI.2003.159208","url":null,"abstract":"In this paper, we focus on the impact of N incorporation on the gate leakage current and the modification of the bonding configuration of HfAlO/sub x/(N) network.","PeriodicalId":221442,"journal":{"name":"Extended Abstracts of International Workshop on Gate Insulator (IEEE Cat. No.03EX765)","volume":"15 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2003-12-19","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123518110","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 2
Gate dielectric scaling for high-performance CMOS: from SiO2 to high-K 高性能CMOS栅极介电尺度:从SiO2到高k
R. Chau, S. Datta, M. Doczy, J. Kavalieros, M. Metz
{"title":"Gate dielectric scaling for high-performance CMOS: from SiO2 to high-K","authors":"R. Chau, S. Datta, M. Doczy, J. Kavalieros, M. Metz","doi":"10.1109/IWGI.2003.159198","DOIUrl":"https://doi.org/10.1109/IWGI.2003.159198","url":null,"abstract":"We have successfully demonstrated very high-performance PMOS and NMOS transistors with high-K/metal-gate gate stacks with the right threshold voltages for both p- and n-channels on bulk Si. We believe that high-K/metal-gate is an option for the 45 nm high-performance logic technology node.","PeriodicalId":221442,"journal":{"name":"Extended Abstracts of International Workshop on Gate Insulator (IEEE Cat. No.03EX765)","volume":"46 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2003-12-19","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"125420221","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 64
In-situ HfSiON/SiO2 gate dielectric fabrication using hot wall batch system 热壁间歇系统原位制备HfSiON/SiO2栅极介质
T. Aoyama, S. Kamiyama, Y. Tamura, T. Sasaki, R. Mitsuhashi, K. Torii, H. Kitajima, T. Arikado
{"title":"In-situ HfSiON/SiO2 gate dielectric fabrication using hot wall batch system","authors":"T. Aoyama, S. Kamiyama, Y. Tamura, T. Sasaki, R. Mitsuhashi, K. Torii, H. Kitajima, T. Arikado","doi":"10.1109/IWGI.2003.159207","DOIUrl":"https://doi.org/10.1109/IWGI.2003.159207","url":null,"abstract":"In this paper, we propose the novel HfSiON fabrication process using hot wall batch system, metal organic chemical vapor deposition and post deposition annealing. Properties of FETs with the HfSiON gate dielectric formed by these novel processes are also reported.","PeriodicalId":221442,"journal":{"name":"Extended Abstracts of International Workshop on Gate Insulator (IEEE Cat. No.03EX765)","volume":"26 5","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2003-12-19","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131686899","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 5
Vapor-liquid hybrid deposition (VALID) of hafnium silicate films using Hf(O/sup t/C4H/sub 9/)4 and Si(OC2H5)4 precursors 以Hf(O/sup /C4H/sub / 9)4和Si(OC2H5)4为前驱体的气液混合沉积(VALID)硅酸铪薄膜
Y. Xuan, T. Yasuda
{"title":"Vapor-liquid hybrid deposition (VALID) of hafnium silicate films using Hf(O/sup t/C4H/sub 9/)4 and Si(OC2H5)4 precursors","authors":"Y. Xuan, T. Yasuda","doi":"10.1109/IWGI.2003.159175","DOIUrl":"https://doi.org/10.1109/IWGI.2003.159175","url":null,"abstract":"Hafnium silicate films were successfully prepared by VALID using TEOS as the Si source. They show well behaved C-V characteristics, and their leakage current density was analysed.","PeriodicalId":221442,"journal":{"name":"Extended Abstracts of International Workshop on Gate Insulator (IEEE Cat. No.03EX765)","volume":"22 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2003-12-19","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124918914","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Further EOT scaling of Ge/HfO2 over Si/HfO2 MOS systems Ge/HfO2在Si/HfO2 MOS系统上的进一步EOT缩放
K. Kita, M. Sasagawa, K. Tomida, M. Tohyama, K. Kyuno, A. Toriumi
{"title":"Further EOT scaling of Ge/HfO2 over Si/HfO2 MOS systems","authors":"K. Kita, M. Sasagawa, K. Tomida, M. Tohyama, K. Kyuno, A. Toriumi","doi":"10.1109/IWGI.2003.159209","DOIUrl":"https://doi.org/10.1109/IWGI.2003.159209","url":null,"abstract":"In this paper, we describe a comprehensive comparision between Ge/HfO/sub 2/ and Si/HfO/sub 2/ system through physical and electrical properties.","PeriodicalId":221442,"journal":{"name":"Extended Abstracts of International Workshop on Gate Insulator (IEEE Cat. No.03EX765)","volume":"44 1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2003-12-19","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122999593","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 2
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