International Conference on Simulation of Semiconductor Processes and Devices, 2003. SISPAD 2003.最新文献

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An investigation of the electron tunneling leakage current through ultrathin oxides/high-k gate stacks at inversion conditions 反演条件下超薄氧化物/高k栅极堆电子隧穿漏电流的研究
B. Govoreanu, P. Blomme, K. Henson, J. van Houdt, K. De Meyer
{"title":"An investigation of the electron tunneling leakage current through ultrathin oxides/high-k gate stacks at inversion conditions","authors":"B. Govoreanu, P. Blomme, K. Henson, J. van Houdt, K. De Meyer","doi":"10.1109/SISPAD.2003.1233693","DOIUrl":"https://doi.org/10.1109/SISPAD.2003.1233693","url":null,"abstract":"An efficient yet accurate model is used for investigating tunneling of minority carriers from the inversion layer of ultrathin MOSFET structures. The model is derived from the concept of the quasibound states lifetimes, which are calculated using a transfer matrix method based on Airy functions. Comparison with experimental data is provided. Performance of high-k materials is discussed and an investigation of their scalability for future CMOS technology nodes is carried out.","PeriodicalId":220325,"journal":{"name":"International Conference on Simulation of Semiconductor Processes and Devices, 2003. SISPAD 2003.","volume":"41 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2003-09-29","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114701853","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 9
Accurate transport modeling with 2D dopant profile effect in L/sub eff/ /spl sim/ 20 nm MOSFETs via inverse modeling L/sub / /spl sim/ 20nm mosfet中二维掺杂剖面效应的精确输运建模
T. Tanaka, H. Kanata, Y. Tagawa, S. Satoh, T. Sugii
{"title":"Accurate transport modeling with 2D dopant profile effect in L/sub eff/ /spl sim/ 20 nm MOSFETs via inverse modeling","authors":"T. Tanaka, H. Kanata, Y. Tagawa, S. Satoh, T. Sugii","doi":"10.1109/SISPAD.2003.1233667","DOIUrl":"https://doi.org/10.1109/SISPAD.2003.1233667","url":null,"abstract":"To accurately consider 2D dopant profile effect, we have studied transport modeling by comparing nMOSFETs with indium or boron pocket implant. Our inverse modeling has successfully extracted their features of dopant profiles and DIBL effects. It has enabled us to evaluate that the generalized hydrodynamic model is highly reliable even in smaller MOSFETs down to L/sub eff/ /spl sim/ 20 nm.","PeriodicalId":220325,"journal":{"name":"International Conference on Simulation of Semiconductor Processes and Devices, 2003. SISPAD 2003.","volume":"51 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2003-09-29","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115490867","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Non-destructive inverse modeling of copper interconnect structure for 90nm technology node 90nm工艺节点铜互连结构的无损逆建模
T. Kunikiyo, T. Watanabe, T. Kanamoto, H. Asazato, M. Shirota, K. Eikyu, Y. Ajioka, H. Makino, K. Ishikawa, S. Iwade, Y. Inoue, K. Yamashita, M. Kobayashi, A. Gohda, Y. Oda, R. Yamaguchi, H. Umimoto, K. Ohtani
{"title":"Non-destructive inverse modeling of copper interconnect structure for 90nm technology node","authors":"T. Kunikiyo, T. Watanabe, T. Kanamoto, H. Asazato, M. Shirota, K. Eikyu, Y. Ajioka, H. Makino, K. Ishikawa, S. Iwade, Y. Inoue, K. Yamashita, M. Kobayashi, A. Gohda, Y. Oda, R. Yamaguchi, H. Umimoto, K. Ohtani","doi":"10.1109/SISPAD.2003.1233630","DOIUrl":"https://doi.org/10.1109/SISPAD.2003.1233630","url":null,"abstract":"We propose non-destructive inverse modeling of copper interconnect cross-sectional structures, which reproduces the pitch dependence of intraand interlayer coupling capacitance parasitic to the interconnect. The coupling capacitances, as well as fringing capacitance, are measured by a proposed test structure based on the charge-based capacitance measurement (CBCM) method (J. C. Chen et al., Tech. Dig. of IEDM, p.69-72, 1996). The present methodology not only provides accurate assessment of actual capacitance variation but provides valuable feedback on the variability of physical parameters such as interlayer dielectric (ILD) thickness and interconnect drawn width reduction or swelling for process control as well. It also ensures the accuracy of LPE (layout parameters extraction) for the 90 nm technology node and beyond.","PeriodicalId":220325,"journal":{"name":"International Conference on Simulation of Semiconductor Processes and Devices, 2003. SISPAD 2003.","volume":"40 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2003-09-29","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114752762","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 3
Thermal noise modeling for short-channel MOSFETs 短沟道mosfet的热噪声建模
Kwangseok Han, Kwyro Lee, Hyungcheol Shin
{"title":"Thermal noise modeling for short-channel MOSFETs","authors":"Kwangseok Han, Kwyro Lee, Hyungcheol Shin","doi":"10.1109/SISPAD.2003.1233642","DOIUrl":"https://doi.org/10.1109/SISPAD.2003.1233642","url":null,"abstract":"In this work, a physics-based MOSFET drain thermal noise current model valid for all channel lengths was presented for the first time. The derived model was verified by extensive experimental noise and charge measurement of devices with channel lengths down to 0.18 /spl mu/m. Excellent agreement between measured and modeled drain thermal noise was obtained for the entire V/sub GS/ and V/sub DS/ bias regions.","PeriodicalId":220325,"journal":{"name":"International Conference on Simulation of Semiconductor Processes and Devices, 2003. SISPAD 2003.","volume":"101 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2003-09-29","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123193605","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 50
Substrate resistance extraction using a multi-domain surface integral formulation 利用多域表面积分公式提取衬底电阻
A. Vithayathil, Xin Hu, J. White
{"title":"Substrate resistance extraction using a multi-domain surface integral formulation","authors":"A. Vithayathil, Xin Hu, J. White","doi":"10.1109/SISPAD.2003.1233702","DOIUrl":"https://doi.org/10.1109/SISPAD.2003.1233702","url":null,"abstract":"In order to assess and optimize layout strategies for minimizing substrate noise, it is necessary to have fast and accurate techniques for computing contact coupling resistances associated with the substrate. In this paper, we describe an extraction method capable of full-chip analysis which combines modest geometric approximations, a novel integral formulation, and an FFT-accelerated preconditioned iterative method.","PeriodicalId":220325,"journal":{"name":"International Conference on Simulation of Semiconductor Processes and Devices, 2003. SISPAD 2003.","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2003-09-29","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"130294325","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 6
Simulation of 2D quantum transport in ultrashort DG-MOSFETs : a fast algorithm using subbands 超短 DG-MOSFET 中的二维量子传输模拟:使用子带的快速算法
N. Abdallah, E. Polizzi, M. Mouis, F. Méhats
{"title":"Simulation of 2D quantum transport in ultrashort DG-MOSFETs : a fast algorithm using subbands","authors":"N. Abdallah, E. Polizzi, M. Mouis, F. Méhats","doi":"10.1109/SISPAD.2003.1233688","DOIUrl":"https://doi.org/10.1109/SISPAD.2003.1233688","url":null,"abstract":"A numerical method for the resolution of the two dimensional Schrodinger equation with an incoming plane wave boundary condition is proposed and applied to the simulation of ultrashort channel double gate MOSFETs. The method relies on the decomposition of the wave function on subband eigenfunctions. The 2-D Schrodinger equation is then equivalent to a nondiagonal one-dimensional matrix Schrodinger system. The size of the matrix being the number of considered subbands. This leads to a drastic reduction of numerical cost. The method is illustrated by simulating a squeezed channel DGMOS.","PeriodicalId":220325,"journal":{"name":"International Conference on Simulation of Semiconductor Processes and Devices, 2003. SISPAD 2003.","volume":"2 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2003-09-29","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129716293","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 5
Substrate orientation-dependence of electron mobility in strained SiGe layers 应变SiGe层中电子迁移率与衬底取向的关系
S. Smirnov, H. Kosina, S. Selberherr
{"title":"Substrate orientation-dependence of electron mobility in strained SiGe layers","authors":"S. Smirnov, H. Kosina, S. Selberherr","doi":"10.1109/SISPAD.2003.1233636","DOIUrl":"https://doi.org/10.1109/SISPAD.2003.1233636","url":null,"abstract":"The behavior of the low field electron mobility in strained active SiGe layers on SiGe substrates with arbitrary orientation and Ge mole fraction is investigated using Monte Carlo simulation. Euler's angles are introduced to determine the substrate orientation and direction for the in-plane component of the mobility. The strain tensor is transformed to a general form and the splitting of X and L valleys is then calculated using linear deformation potential theory. Additionally the hydrostatic shift is taken into account. For doped materials, the ionized impurity scattering rate is modified to take into consideration all valleys and orientations. The Pauli exclusion principle is considered for high doping level and its interplay with the strain effects is discussed.","PeriodicalId":220325,"journal":{"name":"International Conference on Simulation of Semiconductor Processes and Devices, 2003. SISPAD 2003.","volume":"23 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2003-09-29","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"121549349","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 4
Comparison of numerical quantum device models 数值量子器件模型的比较
H. Kosina, M. Nedjalkov, S. Selberherr
{"title":"Comparison of numerical quantum device models","authors":"H. Kosina, M. Nedjalkov, S. Selberherr","doi":"10.1109/SISPAD.2003.1233664","DOIUrl":"https://doi.org/10.1109/SISPAD.2003.1233664","url":null,"abstract":"The Wigner equation and non-equilibrium Green's functions are two formalisms widely used in quantum device simulation. The Wigner equation, commonly solved by finite difference methods, is solved in this work by a recently developed Monte Carlo method. This method resolves both quantum interference and dissipation effects due to scattering with equal accuracy. Both limits, namely the pure quantum ballistic case and the scattering-dominated classical case are treated properly. A comparison of the Wigner MC solver and NEMO-ID is presented. Resonant tunneling diodes from the literature are chosen as benchmark devices. Current/voltage characteristics are compared for different temperatures and the effect of scattering on the current and the charge distribution is shown. Practical device simulation limitations of the Wigner MC method are discussed. Provided that numerical parameters of the Wigner MC method such as the coherence length and the grid size are chosen properly, results are obtained in good quantitative agreement with NEMO-1D.","PeriodicalId":220325,"journal":{"name":"International Conference on Simulation of Semiconductor Processes and Devices, 2003. SISPAD 2003.","volume":"37 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2003-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"130511707","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 7
Implications of gate design on RF performance of sub-100 nm strained-Si/SiGe nMODFETs 栅极设计对亚100nm应变si /SiGe nmodfet射频性能的影响
Q. Ouyang, S. Koester, J. Chu, K. Saenger, J. Ott, K. Jenkins
{"title":"Implications of gate design on RF performance of sub-100 nm strained-Si/SiGe nMODFETs","authors":"Q. Ouyang, S. Koester, J. Chu, K. Saenger, J. Ott, K. Jenkins","doi":"10.1109/SISPAD.2003.1233672","DOIUrl":"https://doi.org/10.1109/SISPAD.2003.1233672","url":null,"abstract":"The effects of gate structure design on RF performance of strained-Si/SiGe nMODFETs are studied using device simulation and experiments. It is found that while gate resistance only affects fringing gate capacitance can have a significant impact on both /sub fr/ and f/sub max/, indicating that the physical gate structure has to be optimized for any specific application. The experiments suggest that low-ic material is needed as sidewall spacer (if any) and passivation for reducing fringing gate capacitance. Furthermore, the simulations show that if low gate resistance can be achieved by using a multi-finger geometry, a rectangular-shaped gate should be used in order to reduce fringing gate capacitance. If not, a T-gate should be used to reduce gate resistance for high f/sub max/.","PeriodicalId":220325,"journal":{"name":"International Conference on Simulation of Semiconductor Processes and Devices, 2003. SISPAD 2003.","volume":"54 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1900-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"133373001","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
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