T. Kunikiyo, T. Watanabe, T. Kanamoto, H. Asazato, M. Shirota, K. Eikyu, Y. Ajioka, H. Makino, K. Ishikawa, S. Iwade, Y. Inoue, K. Yamashita, M. Kobayashi, A. Gohda, Y. Oda, R. Yamaguchi, H. Umimoto, K. Ohtani
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引用次数: 3
摘要
我们提出了铜互连截面结构的非破坏性逆建模,再现了寄生于互连的层内和层间耦合电容的节距依赖性。采用基于电荷电容测量(CBCM)方法(j.c. Chen et al., Tech. Dig)提出的测试结构来测量耦合电容和边缘电容。IEDM,第69-72页,1996年)。目前的方法不仅提供了实际电容变化的准确评估,而且为过程控制提供了有价值的物理参数变化的反馈,如层间介电(ILD)厚度和互连的拉伸宽度减小或膨胀。它还确保了90纳米及以上技术节点LPE(布局参数提取)的准确性。
Non-destructive inverse modeling of copper interconnect structure for 90nm technology node
We propose non-destructive inverse modeling of copper interconnect cross-sectional structures, which reproduces the pitch dependence of intraand interlayer coupling capacitance parasitic to the interconnect. The coupling capacitances, as well as fringing capacitance, are measured by a proposed test structure based on the charge-based capacitance measurement (CBCM) method (J. C. Chen et al., Tech. Dig. of IEDM, p.69-72, 1996). The present methodology not only provides accurate assessment of actual capacitance variation but provides valuable feedback on the variability of physical parameters such as interlayer dielectric (ILD) thickness and interconnect drawn width reduction or swelling for process control as well. It also ensures the accuracy of LPE (layout parameters extraction) for the 90 nm technology node and beyond.